Patents by Inventor Scott Douglas Clark
Scott Douglas Clark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8112590Abstract: In a first aspect, a first method of reducing command processing latency while maintaining memory coherence is provided. The first method includes the steps of (1) providing a memory map including memory addresses available to a system; and (2) arranging the memory addresses into a plurality of groups. At least one of the groups does not require the system, in response to a command that requires access to a memory address in the group from a bus unit, to get permission from all remaining bus units included in the system to maintain memory coherence. Numerous other aspects are provided.Type: GrantFiled: August 29, 2007Date of Patent: February 7, 2012Assignee: International Business Machines CorporationInventors: Jeffrey Douglas Brown, Scott Douglas Clark, Mark S. Fredrickson, Charles Ray Johns, David John Krolak
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Patent number: 8103835Abstract: Embodiments of the invention provide methods and systems for reducing the consumption of inter-node bandwidth by communications maintaining coherence between accelerators and CPUs. The CPUs and the accelerators may be clustered on separate nodes in a multiprocessing environment. Each node that contains a shared memory device may maintain a directory to track blocks of shared memory that may have been cached at other nodes. Therefore, commands and addresses may be transmitted to processors and accelerators at other nodes only if a memory location has been cached outside of a node. Additionally, because accelerators generally do not access the same data as CPUs, only initial read, write, and synchronization operations may be transmitted to other nodes. Intermediate accesses to data may be performed non-coherently. As a result, the inter-chip bandwidth consumed for maintaining coherence may be reduced.Type: GrantFiled: October 11, 2010Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Andrew Henry Wottreng
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Patent number: 8010716Abstract: Methods and apparatus provide for interconnecting one or more multiprocessors and one or more external devices through one or more configurable interface circuits, which are adapted for operation in: (i) a first mode to provide a coherent symmetric interface; or (ii) a second mode to provide a non-coherent interface.Type: GrantFiled: August 18, 2010Date of Patent: August 30, 2011Assignees: Sony Computer Entertainment Inc., International Business Machines CorporationInventors: Takeshi Yamazaki, Scott Douglas Clark, Charles Ray Johns, James Allan Kahle
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Patent number: 7975064Abstract: A mechanism provides for sending an envelope and replying to an envelope. A transmitter is configured to send an envelope. A receiver is coupled to the transmitter, wherein the receiver is configured to receive the envelope and generate a reply envelope. A send buffer is coupled to the transmitter. A receive buffer is coupled to the receiver. A retry timer is coupled to the transmitter, wherein the retry timer is configured to reset upon the receipt of a reply envelope correlated to the transmit envelope. The transmitter is configured to retransmit an envelope if the transmitter does not receive a corresponding reply envelope within a selected time period as determined by the retry timer. This leads to a decrease in the total number of envelopes, transmitted from both the transmitter and the receiver.Type: GrantFiled: September 16, 2004Date of Patent: July 5, 2011Assignee: International Business Machines CorporationInventors: Michael Joseph Carnevale, Scott Douglas Clark, David Wayne Hill, Charles Ray Johns, Thomas K. Pokrandt, Jeffrey Joseph Ruedinger, Dorothy Marie Thelen
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Patent number: 7904787Abstract: Techniques for validating the integrity of a data communications link are provided. By executing error correction/detection calculations, such as CRC calculations, in a pipelined manner, logic may be distributed over multiple machine cycles. As a result, delay involved in the logic for each cycle may be reduced, allowing calculations in systems with higher clock frequencies.Type: GrantFiled: January 9, 2007Date of Patent: March 8, 2011Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Dorothy Marie Thelen
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Publication number: 20110029738Abstract: Embodiments of the invention provide methods and systems for reducing the consumption of inter-node bandwidth by communications maintaining coherence between accelerators and CPUs. The CPUs and the accelerators may be clustered on separate nodes in a multiprocessing environment. Each node that contains a shared memory device may maintain a directory to track blocks of shared memory that may have been cached at other nodes. Therefore, commands and addresses may be transmitted to processors and accelerators at other nodes only if a memory location has been cached outside of a node. Additionally, because accelerators generally do not access the same data as CPUs, only initial read, write, and synchronization operations may be transmitted to other nodes. Intermediate accesses to data may be performed non-coherently. As a result, the inter-chip bandwidth consumed for maintaining coherence may be reduced.Type: ApplicationFiled: October 11, 2010Publication date: February 3, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Scott Douglas Clark, Andrew Henry Wottreng
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Publication number: 20100312969Abstract: Methods and apparatus provide for interconnecting one or more multiprocessors and one or more external devices through one or more configurable interface circuits, which are adapted for operation in: (i) a first mode to provide a coherent symmetric interface; or (ii) a second mode to provide a non-coherent interface.Type: ApplicationFiled: August 18, 2010Publication date: December 9, 2010Applicant: Sony Computer Entertainment Inc.Inventors: Takeshi Yamazaki, Scott Douglas Clark, Charles Ray Johns, James Allan Kahle
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Patent number: 7818507Abstract: Methods and apparatus provide for sending a data command from a first of a plurality of devices to a first address concentrator within a first of a plurality of processing systems; selecting one of the other processing systems, the selected processing system having data addressed by the data command stored therein; sending the data command to a first address concentrator of the selected processing system; and broadcasting the data command from the first address concentrator of the selected processing system to a second address concentrator in each of the processing systems.Type: GrantFiled: April 4, 2005Date of Patent: October 19, 2010Assignees: Sony Computer Entertainment Inc., International Business Machines CorporationInventors: Takeshi Yamazaki, Jeffrey Douglas Brown, Scott Douglas Clark, Charles Ray Johns
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Patent number: 7814279Abstract: Embodiments of the invention provide methods and systems for reducing the consumption of inter-node bandwidth by communications maintaining coherence between accelerators and CPUs. The CPUs and the accelerators may be clustered on separate nodes in a multiprocessing environment. Each node that contains a shared memory device may maintain a directory to track blocks of shared memory that may have been cached at other nodes. Therefore, commands and addresses may be transmitted to processors and accelerators at other nodes only if a memory location has been cached outside of a node. Additionally, because accelerators generally do not access the same data as CPUs, only initial read, write, and synchronization operations may be transmitted to other nodes. Intermediate accesses to data may be performed non-coherently. As a result, the inter-chip bandwidth consumed for maintaining coherence may be reduced.Type: GrantFiled: March 23, 2006Date of Patent: October 12, 2010Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Andrew Henry Wottreng
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Patent number: 7802023Abstract: Methods and apparatus provide for interconnecting one or more multiprocessors and one or more external devices through one or more configurable interface circuits, which are adapted for operation in: (i) a first mode to provide a coherent symmetric interface; or (ii) a second mode to provide a non-coherent interface.Type: GrantFiled: October 14, 2005Date of Patent: September 21, 2010Assignees: Sony Computer Entertainment Inc., International Business Machines CorporationInventors: Takeshi Yamazaki, Scott Douglas Clark, Charles Ray Johns, James Allan Kahle
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Patent number: 7746777Abstract: Disclosed is an apparatus and method for granting guaranteed bandwidth between one or more data transmission priority requesting sources and one or more resources upon request. Data sources that do not request an assigned bandwidth are served on a “best efforts” basis. The system allows additional bandwidth to priority requesting sources when it is determined that the resource and/or the communication path to the resource is under-utilized. The system further allows the granted bandwidth to be shared by more than one source in a multiprocessor system.Type: GrantFiled: September 30, 2003Date of Patent: June 29, 2010Assignee: International Business Machines CorporationInventors: Jeffrey Douglas Brown, Scott Douglas Clark, John David Irish
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Patent number: 7725660Abstract: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A local node makes a determination whether a request is a local or system request. If the request is a local request, a look-up of a directory in the local node is performed. If an entry in the directory of the local node indicates that data in the request does not have a remote owner and that the request does not have a remote destination, the coherency of the data is resolved on the local node, and a transfer of the data specified in the request is performed if required and if the request is a local request. If the entry indicates that the data has a remote owner or that the request has a remote destination, the request is forwarded to all remote nodes in the multi-node system.Type: GrantFiled: July 26, 2007Date of Patent: May 25, 2010Assignee: International Business Machines CorporationInventors: Gary Dale Carpenter, Scott Douglas Clark, Bernard Charles Drerup, Russell Dean Hoover, Charles Ray Johns, David John Krolak, Prasanna Srinivasan, Thuong Quang Truong
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Patent number: 7669013Abstract: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A look-up of a local node directory is performed if a request received at a multi-node bridge of the local node is a system request. If a directory entry indicates that data specified in the request has a local owner or local destination, the request is forwarded to the local node. If the local node determines that the request is a local request, a look-up of the local node directory is performed. If the directory entry indicates that data specified in the request has a local owner and local destination, the coherency of the data on the local node is resolved and a transfer of the request data is performed if required. Otherwise, the request is forwarded to all remote nodes in the multi-node system.Type: GrantFiled: July 26, 2007Date of Patent: February 23, 2010Assignee: International Business Machines CorporationInventors: Gary Dale Carpenter, Scott Douglas Clark, Bernard Charles Drerup, Russell Dean Hoover, Charles Ray Johns, David John Krolak, Prasanna Srinivasan, Thuong Quang Truong
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Patent number: 7647433Abstract: A system and method for flexible multiple protocols are presented. A device's logical layer may be dynamically configured on a per interface basis to communicate with external devices in a coherent or a non-coherent mode. In coherent mode, commands such as coherency protocol, system commands, and snoop response pass from the device's internal system bus to an external device, thereby creating a logical extension of the devices internal system bus. In non-coherent mode, the input-output bus unit receives commands from the internal system bus and generates non-coherent input-output commands, which are eventually received by an external device.Type: GrantFiled: August 23, 2007Date of Patent: January 12, 2010Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Charles Ray Johns, James Allan Kahle
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Patent number: 7646837Abstract: A method and apparatus are provided for implementing bandwidth control in a communication link. A set link configuration for the communications link establishes a number of clock cycles required to transmit a data envelope. A control function aligns a start of a data packet on a fixed cycle boundary for data envelope transmissions. The control function aligns the start of a data packet in the same byte of the 16 byte field. The control function is implemented with a memory management input/output (MMIO) register and a counter, and allows a transmitting side of the communications link to control the pacing of data packet transmission or bandwidth by aligning all data packets on fixed-cycle boundaries.Type: GrantFiled: April 28, 2006Date of Patent: January 12, 2010Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Dorothy Marie Thelen
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Patent number: 7551557Abstract: The present invention provides for dynamically determining a ratio of forwarded packets to injected packets to be transmitted in a bus ring. At least one forwarded packet is received into a first queue. An injected packet is received into a second queue. A determination, or snapshot, of the number of forwarded packets in the first queue due to the presence of the injected packet in the second queue is triggered. Packets corresponding to the snapshot are transmitted. After the packets are transmitted, if there is another injected packet stored in the second queue, another snapshot is performed. Packets corresponding to this snapshot are transmitted, and so on.Type: GrantFiled: June 19, 2003Date of Patent: June 23, 2009Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Jeffrey Joseph Ruedinger
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Patent number: 7530068Abstract: A method and apparatus are provided for efficiently managing limited resources is a given computer system. The system utilizes a token manager that assigns tokens to groups of associated requestors. The tokens are then utilized by the requesters to occupy the given resource. The allocation of these tokens, thus, prevents such problems as denial of service due to a lack of available resources.Type: GrantFiled: December 17, 2003Date of Patent: May 5, 2009Assignee: International Business Machines CorporationInventors: Scott Douglas Clark, Michael Norman Day, Charles Ray Johns, Andrew Henry Wottreng
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Publication number: 20090031085Abstract: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A look-up of a local node directory is performed if a request received at a multi-node bridge of the local node is a system request. If a directory entry indicates that data specified in the request has a local owner or local destination, the request is forwarded to the local node. If the local node determines that the request is a local request, a look-up of the local node directory is performed. If the directory entry indicates that data specified in the request has a local owner and local destination, the coherency of the data on the local node is resolved and a transfer of the request data is performed if required. Otherwise, the request is forwarded to all remote nodes in the multi-node system.Type: ApplicationFiled: July 26, 2007Publication date: January 29, 2009Inventors: Gary Dale Carpenter, Scott Douglas Clark, Bernard Charles Drerup, Russell Dean Hoover, Charles Ray Johns, David John Krolak, Prasanna Srinivasan, Thuong Quang Truong
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Publication number: 20090031086Abstract: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A local node makes a determination whether a request is a local or system request. If the request is a local request, a look-up of a directory in the local node is performed. If an entry in the directory of the local node indicates that data in the request does not have a remote owner and that the request does not have a remote destination, the coherency of the data is resolved on the local node, and a transfer of the data specified in the request is performed if required and if the request is a local request. If the entry indicates that the data has a remote owner or that the request has a remote destination, the request is forwarded to all remote nodes in the multi-node system.Type: ApplicationFiled: July 26, 2007Publication date: January 29, 2009Inventors: Gary Dale Carpenter, Scott Douglas Clark, Bernard Charles Drerup, Russell Dean Hoover, Charles Ray Johns, David John Krolak, Prasanna Srinivasan, Thuong Quang Truong
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Publication number: 20080168323Abstract: Techniques for validating the integrity of a data communications link are provided. By executing error correction/detection calculations, such as CRC calculations, in a pipelined manner, logic may be distributed over multiple machine cycles.Type: ApplicationFiled: January 9, 2007Publication date: July 10, 2008Inventors: Scott Douglas Clark, Dorothy Marie Thelen