Patents by Inventor Scott E. Doyle

Scott E. Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Single-event upset tolerant latch for sense amplifiers
    Patent number: 6487134
    Abstract: A single-event upset tolerant sense latch circuit for sense amplifiers is disclosed. The single-event upset tolerant sense latch circuit includes a first set of isolation transistors, a second set of isolation transistors, a first set of dual-path inverters, a second set of dual-path inverters, and an isolation transistor. The first set of isolation transistors is coupled to a first bitline, and the second set of isolation transistors is coupled to a second bitline. The second bitline is complementary to the first bitline. The first set of dual-path inverters is coupled to the first set of isolation transistors, and the first set of dual-path inverters includes a first transistor connected to a second transistor in series along with a third transistor connected to a fourth transistor in series.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: November 26, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: Nandor G. Thoma, Scott E. Doyle
  • Single-event upset tolerant latch for sense amplifiers
    Publication number: 20020018372
    Abstract: A single-event upset tolerant sense latch circuit for sense amplifiers is disclosed. The single-event upset tolerant sense latch circuit includes a first set of isolation transistors, a second set of isolation transistors, a first set of dual-path inverters, a second set of dual-path inverters, and an isolation transistor. The first set of isolation transistors is coupled to a first bitline, and the second set of isolation transistors is coupled to a second bitline. The second bitline is complementary to the first bitline. The first set of dual-path inverters is coupled to the first set of isolation transistors, and the first set of dual-path inverters includes a first transistor connected to a second transistor in series along with a third transistor connected to a fourth transistor in series.
    Type: Application
    Filed: August 9, 2001
    Publication date: February 14, 2002
    Applicant: BAE Systems Information
    Inventors: Nandor G. Thoma, Scott E. Doyle