Abstract: Described are methods and modules for reducing the phase noise generated in a fractional-N frequency synthesizer. The methods are based on swapping phase signals to achieve the same average delay for each phase signal path, compensation and resynchronization of phase signals and shuffling of digital-to-analog unit elements used to produce specific quantization levels. One method is based on digital gain compensation used to correct for frequency-dependent error arising from differences between horizontal slicing quantization techniques and conventional vertical slicing techniques. Also described are a combined phase detector and DAC module and a method for extending its range.