Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for bad row mode. The memory may prevent proper access operations (e.g., read operations) from being performed on a selected bad row of the memory as part of a bad row mode. For example, the memory may store a bad row address and when an access address matches the bad row address, may suppress one or more signals, change data read from the address, or combinations thereof. The bad row mode may be used to provide a positive control for post package repair (PPR) operations on the memory. A controller may enter the memory into bad row mode and then test the memory to determine if the selected bad row can be located and repaired via PPR.

Abstract: A frequency multiplier system includes a first frequency multiplier circuit to generate a first signal having a first frequency. The first frequency multiplier circuit includes a first post-divider circuit to divide the first frequency of the first signal to a first output frequency within a bounded first range of frequencies, and a first programmable frequency transition controller to control a transitioning frequency relationship between the first signal having the first frequency and a target signal having a desired target frequency. The system includes a second frequency multiplier circuit to generate a second signal having a second frequency.

Abstract: An off-road chair comprises a U-shaped chassis configured to receive a rider in a wheel chair type (manual or electric); at least one wheel attached to the chassis; and a floor section. The floor section is configured to attach to the bottom of the U-shaped chassis and to provide a floor; be lowered to provide a ramp for the rider to get on the floor section; and be raised to attach to a bottom part of the U-shaped chassis. The U-shaped chassis is configured to receive a wheel chair type (manual or electric) carrying the rider. The off-road chair further comprises a front bumper attached to a front of the U-shaped chassis, wherein the front bumper is configured to swing up with respect to the U-shaped chassis, enabling the rider to get on the floor section; and be lowered to lock to the chassis and protect the rider.

Abstract: An off-road chair comprises a U-shaped chassis configured to receive a rider in a wheel chair type (manual or electric); at least one wheel attached to the chassis; and a floor section. The floor section is configured to attach to the bottom of the U-shaped chassis and to provide a floor; be lowered to provide a ramp for the rider to get on the floor section; and be raised to attach to a bottom part of the U-shaped chassis. The U-shaped chassis is configured to receive a wheel chair type (manual or electric) carrying the rider. The off-road chair further comprises a front bumper attached to a front of the U-shaped chassis, wherein the front bumper is configured to swing up with respect to the U-shaped chassis, enabling the rider to get on the floor section; and be lowered to lock to the chassis and protect the rider.

Abstract: An unmanned guided vehicle that is at least twice as fast as those of the prior art, lighter, less vulnerable, and more reliable than the prior art having at least one of: a dual-action dogleg suspension system; a track system comprising a plurality of cleats, a rubber insert secured to each cleat, and two cables serially joining each cleat to make up a track; a track guide system comprising a shark fin secured to each cleat that runs through a plurality of track guides; a dry clutch and braking system; a tubular chassis comprising a tubular center chassis and a tubular suspension chassis; a spring-loaded piston track tension compensator system; a flat drive tooth drive sprocket system that allows for clearing foreign debris from between the teeth; and a suspension carrier modular design assembly system comprising a passenger side suspension carrier, center cage, and driver's side suspension carrier.

Abstract: A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D? signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45?±10%) in the USB transceiver.

Abstract: A mixed signal integrated circuit includes a signal source to inject a test signal into the signal path of the mixed signal integrated circuit, a feedback loop and a signal comparator for determining characteristics of a resulting signal. Conveniently, the test signal may be a digital signal injected upstream of a digital to analog converter (DAC). By connecting the output to the input, the entirety of the signal path and the majority of the integrated circuit may be tested. The signal may be condition or manipulated in the feedback loop. By incorporating test signal generation and measurement into the mixed signal integrated circuit, the cost of test equipment and the test duration for each device under test may be reduced.

Abstract: A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D? signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45 ?±10%) in the USB transceiver.

Abstract: A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D? signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45?±10%) in the USB transceiver.

Abstract: An unmanned guided vehicle that is at least twice as fast as those of the prior art, lighter, less vulnerable, and more reliable than the prior art having at least one of: a dual-action dogleg suspension system; a track system comprising a plurality of cleats, a rubber insert secured to each cleat, and two cables serially joining each cleat to make up a track; a track guide system comprising a shark fin secured to each cleat that runs through a plurality of track guides; a dry clutch and braking system; a tubular chassis comprising a tubular center chassis and a tubular suspension chassis; a spring-loaded piston track tension compensator system; a flat drive tooth drive sprocket system that allows for clearing foreign debris from between the teeth; and a suspension carrier modular design assembly system comprising a passenger side suspension carrier, center cage, and driver's side suspension carrier.

Abstract: A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D? signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45?±10%) in the USB transceiver.

Abstract: This invention relates to a low loss liquid processing system used for manufacturing personal care and cleaning compositions, in particular oral care compositions such as dentifrice, mouthrinse and denture care products. The present process addresses manufacturing flexibility issues involved in making products to demand and the ability to proactively monitor intermediate compositions for quality assurance purposes. Specifically, the present manufacturing process provides faster variant turnaround times, shorter clean-up times between variants, significant material waste reduction and smaller effluent volumes than those of typical batch systems. As well, a process has been developed for more efficient addition of materials which are dissimilar in chemical composition and/or physical parameters to the original base material or of materials which may be temperature and shear sensitive.

Abstract: A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D? signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45 ?±10%) in the USB transceiver.

Abstract: A Universal Serial Bus (USB) 2.0 transceiver includes a legacy full speed and low speed (FS/LS) USB driver that includes multiple output stages. The multiple output stages are connected in parallel to an output terminal. By sequentially providing the USB data to the multiple output stages, the USB signal at the output terminal will transition between logic states in an incremental fashion as the multiple output stages sequentially switch their individual output states. Consequently, the rise/fall time for the legacy FS/LS USB driver is controlled not by the strength of the inverter transistors in the output stages, but rather by the number of stages and the time interval between application of the USB data to each stage. Therefore, by selecting an appropriate number of output stages and an appropriate timing interval, accurate control over full speed and low speed USB signal rise/fall times can be provided.

Abstract: A USB 2.0 transceiver includes a legacy full speed and low speed (FS/LS) USB driver that includes multiple output stages. The multiple output stages are connected in parallel to an output terminal. By sequentially providing the USB data to the multiple output stages, the USB signal at the output terminal will transition between logic states in an incremental fashion as the multiple output stages sequentially switch their individual output states. Consequently, the rise/fall time for the legacy FS/LS USB driver is controlled not by the strength of the inverter transistors in the output stages, but rather by the number of stages and the time interval between application of the USB data to each stage. Therefore, by selecting an appropriate number of output stages and an appropriate timing interval, accurate control over full speed and low speed USB signal rise/fall times can be provided.

Abstract: A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D? signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45 ?±10%) in the USB transceiver.

Abstract: The present invention discloses a method for fabricating an electroluminescent lamp that includes a step in which an electroluminescent active layer is formed by curing a UV curable electroluminescent composition. Embodiments of the method of the present invention in which each layer of a multilayer electroluminescent device are fabricated from UV curable compositions are also disclosed. A UV curable dielectric composition suitable for utilization in an electroluminescent lamp is also provided.

Abstract: An extra super multi-story building having one piece of extra super multi-story of about 200 story construction, two pieces of extra super multi-stories of about 150 story construction and one piece of extra super multi-story of about 100 story construction. Each extra super multi-story includes two through four pieces of tower-like super multi-stories of about 50 story construction and of about 50 m in diameter (floor area: about 200 m.sup.2 /story). A sky lobby is provided about every 50 stories connecting the extra super multi-stories. Four shuttle elevators lead from the ground to the sky lobbies, and a sightseeing tower and high-rise garden (sky dome) are provided at the rooftop of the extra super multi-story building. Main facilities such as offices, hotels and residences are arranged in each extra multi-story.