Patents by Inventor Scott J. Bukofsky

Scott J. Bukofsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7475380
    Abstract: A system, method and recording medium are provided for generating patterns of a paired set of a block mask and a phase shift mask from a data set defining a circuit layout to be provided on a substrate. A circuit layout is inputted and critical segments of the circuit layout are identified. Then, based on the identified critical segments, block mask patterns are generated and legalized for inclusion in a block mask. Thereafter, based on the identified critical segments and the block mask patterns, phase mask patterns are generated, legalized and colored to define a phase shift mask for use in a dual exposure method with the block mask for patterning the identified critical segments of the circuit layout.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Lars W. Liebmann, Scott J. Bukofsky, Ioana Graur
  • Patent number: 7354779
    Abstract: Methods for applying topographically compensated film in a semiconductor wafer fabrication process are disclosed. The processes include premapping a surface of a wafer so as to determine the local topography (e.g., z-height) of the wafer and then applying a variable depth of a film to the wafer, such that the variable depth is modulated based on the local topography of the wafer. The resultant topography of the applied film and wafer is substantially planar (e.g., within approximately 100 nm) across the wafer.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: April 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Colin J. Brodsky, Scott J. Bukofsky, Allen H. Gabor
  • Patent number: 7239371
    Abstract: A method and apparatus are provided for improving the leveling and, consequently, the focusing of a substrate such as a wafer during the photolithography imaging procedure of a semiconductor manufacturing process. The invention performs a pre-scan of the wafer's topography and assigns importance values to different regions of the wafer surface. Exposure focus instructions are calculated based on the topography and importance values of the different regions and the wafer is then scanned and imaged based on the calculated exposure focus instructions.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: July 3, 2007
    Assignee: International Business Machines Corporation
    Inventors: Bernhard R. Liegl, Colin J. Brodsky, Scott J. Bukofsky, Steven J. Holmes
  • Patent number: 7229936
    Abstract: A method is provided for preparing a substrate for photolithographic patterning. The method includes providing a substrate having at least an exposed rough surface layer including a polymeric material. The rough surface layer has surface features characterized by feature step height varying between about two percent and twenty percent of the minimum photolithographic half-pitch. A layer of photoresist material is then provided over the exposed rough surface layer and patterned.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: June 12, 2007
    Assignee: International Business Machines Corporation
    Inventors: Colin J. Brodsky, Scott J. Bukofsky, Dario L. Goldfarb, Scott D. Halle
  • Patent number: 7135255
    Abstract: A phase shift mask shape that reduces line-end shortening at the critical feature without changing layout size increases required of requisite phase shift rules. The phase feature is given an angled extension, which includes the lithographic shortening value. This allows the critical shape to be designed much closer to the reference layer then it could without the angled extension feature. Phase mask extension features beyond a given device segment are significantly reduced by lengthening the feature along an uncritical portion; moving the feature reference point to the device layer; and flattening the phase extension feature into an L-shape or T-shape along the uncritical parts of a device segment. Applying these design rules allows a draw of the gate conductor under current conditions and puts phase shapes inside without extending the gate conductor dimensions to the next feature.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: November 14, 2006
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Scott J. Bukofsky, John K. DeBrosse, Marco Hug, Lars W. Liebmann, Daniel J. Nickel, Juergen Preuninger
  • Patent number: 6993741
    Abstract: A method of generating patterns of a pair of photomasks from a data set defining a circuit layout to be provided on a substrate includes identifying critical segments of the circuit layout to be provided on the substrate. Block mask patterns are generated and then legalized based on the identified critical segments. Thereafter, phase mask patterns are generated, legalized and colored. The legalized block mask patterns and the legalized phase mask patterns that have been colored define features of a block mask and an alternating phase shift mask, respectively, for use in a dual exposure method for patterning features in a resist layer of a substrate.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: January 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: Lars W. Liebmann, Scott J. Bukofsky, Ioana Graur
  • Patent number: 6824932
    Abstract: A method and apparatus for making phase shift masks are provided wherein an anti-reflective coating used on an opaque pattern layer of the mask fully covers the opaque pattern layer and has not been etched in the etching process to form the phase shift mask. A two-exposure method to form the phase shift mask is used wherein a photoresist having a defined dose-to-clear level is coated on the surface of the mask and the lower surface of the mask is exposed to a blanket exposure in an energy amount less than the dose-to-clear level. The open areas of the upper surface of the mask to be etched are exposed to an energy dose in an amount less than the dose-to-clear level, with the sum of the amounts of the lower surface energy and upper surface energy being at least the dose-to-clear level. The method and apparatus minimizes and/or avoids etching of the anti-reflective coating.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: November 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Scott J. Bukofsky, Carlos A. Fonseca, Michael S. Hibbs, Lars W. Liebmann
  • Publication number: 20040191638
    Abstract: A phase shift mask shape that reduces line-end shortening at the critical feature without changing layout size increases required of requisite phase shift rules. The phase feature is given an angled extension, which includes the lithographic shortening value. This allows the critical shape to be designed much closer to the reference layer then it could without the angled extension feature. Phase mask extension features beyond a given device segment are significantly reduced by lengthening the feature along an uncritical portion; moving the feature reference point to the device layer; and flattening the phase extension feature into an L-shape or T-shape along the uncritical parts of a device segment. Applying these design rules allows a draw of the gate conductor under current conditions and puts phase shapes inside without extending the gate conductor dimensions to the next feature.
    Type: Application
    Filed: March 31, 2003
    Publication date: September 30, 2004
    Applicants: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Scott J. Bukofsky, John K. DeBrosse, Marco Hug, Lars W. Liebmann, Daniel J. Nickel, Juergen Preuninger
  • Patent number: 6777147
    Abstract: A method of evaluating process effects of multiple exposure photolithographic processes by first determining a set of expected images for each exposure step or process of the multiple exposure process individually and then obtaining a composite set of images by sequentially perturbing images from a first or previous exposure step by weighted images from the subsequent exposure step. Preferably, the expected images are determined by simulation in the form of normalized aerial images over a range of defocus for each exposure step, and the weighting factor used is the dose-ratio of the subsequent exposure dose to the prior step exposure dose. The resulting composite set of images may be used to evaluate multiple exposure processes, for example, to provide an estimate of yield for a given budget of dose and focus errors, or alternatively, to provide specifications for tool error budgets required to obtain a target yield.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Carlos A. Fonseca, Scott J. Bukofsky, Kafai Lai
  • Publication number: 20030228526
    Abstract: A method and apparatus for making phase shift masks are provided wherein an anti-reflective coating used on an opaque pattern layer of the mask fully covers the opaque pattern layer and has not been etched in the etching process to form the phase shift mask. A two-exposure method to form the phase shift mask is used wherein a photoresist having a defined dose-to-clear level is coated on the surface of the mask and the lower surface of the mask is exposed to a blanket exposure in an energy amount less than the dose-to-clear level. The open areas of the upper surface of the mask to be etched are exposed to an energy dose in an amount less than the dose-to-clear level, with the sum of the amounts of the lower surface energy and upper surface energy being at least the dose-to-clear level. The method and apparatus minimizes and/or avoids etching of the anti-reflective coating.
    Type: Application
    Filed: June 5, 2002
    Publication date: December 11, 2003
    Applicant: International Business Machines Corporation
    Inventors: Scott J. Bukofsky, Carlos A. Fonseca, Michael S. Hibbs, Lars W. Liebmann
  • Patent number: 6511791
    Abstract: A method for exposing a workpiece in a dual exposure step-and-repeat process starts by forming a design for a reticle mask. Deconstruct the design for the reticle mask by removing a set(s) of the features that are juxtaposed to form hollow polygonally-shaped clusters with a gap in the center. Form unexposed resist on the workpiece. Load the workpiece and the reticle mask into the stepper. Expose the workpiece through the reticle mask. Reposition the workpiece by a nanostep. Then expose the workpiece through the reticle mask after the repositioning. Test whether the plural exposure process is finished. If the result of the test is NO the process loops back to repeat some of the above steps. Otherwise the process has been completed. An overlay mark is produced by plural exposures of a single mark. A dead zone is provided surrounding an array region in which printing occurs subsequent to exposure in an original exposure.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: January 28, 2003
    Assignees: International Business machines Corporation, Infineon Technologies North American Corp.
    Inventors: Scott J. Bukofsky, Gerhard Kunkel, Richard Wise, Alfred K. Wong
  • Patent number: 6451490
    Abstract: Image shortening in a photolithographic process is substantially reduced by using sub-resolution reticle features to alter the aerial image in the shortened regions. The use of such sub-resolution reticle features is simple to implement in a design system, and allows for increased feature aspect ratio as well as overlap to other critical features.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: September 17, 2002
    Assignee: International Business Machines Corporation
    Inventors: William H. Advocate, Scott J. Bukofsky, Christopher Adam Feild, Donald J. Samuels
  • Patent number: 6451508
    Abstract: A method for exposing a workpiece in a dual exposure step-and-repeat process starts by forming a design for a reticle mask. Deconstruct the design for the reticle mask by removing a set(s) of the features that are juxtaposed. Form unexposed resist on the workpiece. Load the workpiece and the reticle mask into the stepper. Expose the workpiece through the reticle mask. Reposition the workpiece by a nanostep. Then expose the workpiece through the reticle mask after the repositioning. Test whether the plural exposure process is finished. If the result of the test is NO the process loops back to repeat some of the above steps. Otherwise the process has been completed. An overlay mark is produced by plural exposures of a single mark. A dead zone is provided surrounding an array region in which printing occurs subsequent to exposure in an original exposure. Stepper-framing-blades are moved over the dead zone to prevent additional exposures after an initial exposure.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: September 17, 2002
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Scott J. Bukofsky, Gerhard Kunkel, Alan C. Thomas
  • Patent number: 6327023
    Abstract: A scanning method capable of reducing across chip linewidth variation and image placement error is disclosed, the method including a step whereby a reticle having a plurality of lines is scanned in a direction perpendicular to the lines. The scanning method includes a radiation source provided with an aperture with a slot. In this case, it is preferable that the radiation source keeps the rectangular slot in the direction that minimizes pattern distortions.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: December 4, 2001
    Assignee: International Business Machines Corporation
    Inventors: Scott J. Bukofsky, Christopher J. Progler
  • Publication number: 20010001698
    Abstract: A method of imaging acids in chemically amplified photoresists involves exposing to radiation a chemically amplified photoresist comprising a pH-dependent fluorophore. Upon exposure to radiation, such as deep-UV radiation, the chemically amplified photoresist produces an acid, which is then visualized by the fluorescence of the pH-dependent fluorophore. An image is generated from the fluorescence of the pH-dependent fluorophore, thus providing a map of the location of the acid in the photoresist. The images are able to be visualized prior to a post-exposure bake of the resist composition. Chemically amplified photoresists comprising pH-dependent fluorophores are useful in the practice of the present invention. The method finds particular use in examining the efficiency of photoacid generators in chemically amplified photoresists, in that it allows the practitioner the ability to directly determine the amount of acid generated within the photoresist.
    Type: Application
    Filed: May 26, 1999
    Publication date: May 24, 2001
    Applicant: Robert David Grober
    Inventors: ROBERT D. GROBER, SCOTT J. BUKOFSKY, PAUL M. DENTINGER, JAMES W. TAYLOR