Patents by Inventor Scott Kirkman

Scott Kirkman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10892316
    Abstract: A circuit package is provided that includes a substrate having a first side and a second side, an integrated circuit component coupled to the second side of the substrate, and a ball grid array formed on the first side of the substrate, the ball grid array including multiple contact balls arranged in a pattern. Each of a first subset of the contact balls is electrically coupled to a first voltage input of an integrated circuit component, and each of a second subset of the contact balls is electrically coupled to a second voltage input of the integrated circuit component. The package also includes a capacitor mounted to the first side and having a first terminal coupled to a first contact ball in the first subset of the contact balls and a second terminal coupled to a second contact ball in the second subset of the contact balls.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: January 12, 2021
    Assignee: Google LLC
    Inventor: Scott Kirkman
  • Publication number: 20200161413
    Abstract: A circuit package is provided that includes a substrate having a first side and a second side, an integrated circuit component coupled to the second side of the substrate, and a ball grid array formed on the first side of the substrate, the ball grid array including multiple contact balls arranged in a pattern. Each of a first subset of the contact balls is electrically coupled to a first voltage input of an integrated circuit component, and each of a second subset of the contact balls is electrically coupled to a second voltage input of the integrated circuit component. The package also includes a capacitor mounted to the first side and having a first terminal coupled to a first contact ball in the first subset of the contact balls and a second terminal coupled to a second contact ball in the second subset of the contact balls.
    Type: Application
    Filed: March 29, 2019
    Publication date: May 21, 2020
    Inventor: Scott Kirkman
  • Publication number: 20070080441
    Abstract: An apparatus and method for connecting one substrate, such as a semiconductor die, to an opposing substrate, such as a semiconductor package or circuit board, through a plurality of intermediate thermal compensator devices, each of which can incrementally and/or locally mitigate the stresses imposed by differences in the two substrate's thermal expansion characteristics. The compensator devices can be coupled to one another, with the resulting assembly attached to the first substrate on one side, and to the second substrate on the other side, through solder bump attach, or some equivalent method. The method of the invention provides electrical connection and thermal dissipation between the two substrates as well as providing mechanical protection by absorbing the stresses imposed by the difference in thermal expansion characteristics of the two substrates.
    Type: Application
    Filed: August 18, 2005
    Publication date: April 12, 2007
    Inventors: Scott Kirkman, Bidyut Sen
  • Patent number: 7007741
    Abstract: A heat spreader apparatus for cooling an electronic component and method of attachment. The heat spreader comprises a flexible wall that partially conforms to a non-matching mating surface of the component when pressure is applied to the surface of the flexible wall that is opposite the component. The pressure may be maintained against the flexible wall during use, or released once the flexible wall is maintained in its conforming location by an adhesive.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: March 7, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Bidyut K. Sen, Scott Kirkman, Vadim Gektin
  • Publication number: 20040074630
    Abstract: A heat spreader apparatus for cooling an electronic component and method of attachment. The heat spreader comprises a flexible wall that partially conforms to a non-matching mating surface of the component when pressure is applied to the surface of the flexible wall that is opposite the component. The pressure may be maintained against the flexible wall during use, or released once the flexible wall is maintained in its conforming location by an adhesive.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 22, 2004
    Inventors: Bidyut K. Sen, Scott Kirkman, Vadim Gektin
  • Patent number: 6137168
    Abstract: A semiconductor device package is presented for housing an integrated circuit which includes bonding fingers located within a conductive ring structure and routed to device terminals on an underside surface of the semiconductor device package. The semiconductor device package includes a die area defined upon a planar upper surface, a conductive ring surrounding the die area, and a first set of bonding fingers arranged within the conductive ring. The die area is dimensioned to receive the integrated circuit. The conductive ring may be a power ring or a ground ring. The conductive ring and the first set of bonding fingers are located within a first signal layer adjacent to the upper surface. A set of bonding pads which serve as device terminals reside within a second signal layer adjacent to a planar underside surface.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: October 24, 2000
    Assignee: LSI Logic Corporation
    Inventor: Scott Kirkman
  • Patent number: 5992012
    Abstract: In the manufacture of Printed Circuit (PC) boards, conductors are placed in a base layer of glass cloth. The conductors penetrate the thickness of the cloth and can be arranged to form a matrix or grid. The arrangement of cloth and conductors is then cured with resin with the wire lengths disposed within the cured board core. The wire lengths can be made flush with the board core surfaces and become the electrical conductors between circuitry on such surfaces. In one embodiment, the wire is removed leaving a finished hole ready for standard through-hole plating. These finished circuit boards can be stacked and laminated forming through, blind, or buried vias. One or more finished circuit boards with imbedded vias can be used as circuitry redistribution layers to avoid dense circuit patterns in applications such as in flip-chip mounting of integrated circuit chips. In another embodiment, the conductors are imbedded in the glass cloth with sufficient density to form a composite thick conductor.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: November 30, 1999
    Assignee: LSI Logic Corporation
    Inventor: Scott Kirkman
  • Patent number: 5911112
    Abstract: A semiconductor device package containing a semiconductor die uses a platform mounted on an active face of the die. The platform electrically connects to at least one bond pad on the die. A package lid electrically connects to the platform on the die and a package case connection. The package case connection is also electrically connected to at least one external connector on the package. The platform and package lid thereby connect the at least one bond pad on the die to the at least one external connector on the package. Using the platform and lid for electrical connections from the semiconductor die bond pads to the external package connector reduce the number of bond fingers required to surround the perimeter of the die. The package lid and platform may, for example, be used for ground or power connections to the die bond pads.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: June 8, 1999
    Assignee: LSI Logic Corporation
    Inventor: Scott Kirkman
  • Patent number: 5793104
    Abstract: A semiconductor device package containing a semiconductor die uses a platform mounted on an active face of the die. The platform electrically connects to at least one bond pad on the die. A package lid electrically connects to the platform on the die and a package case connection. The package case connection is also electrically connected to at least one external connector on the package. The platform and package lid thereby connect the at least one bond pad on the die to the at least one external connector on the package. Using the platform and lid for electrical connections from the semiconductor die bond pads to the external package connector reduce the number of bond fingers required to surround the perimeter of the die. The package lid and platform may, for example, be used for ground or power connections to the die bond pads.
    Type: Grant
    Filed: February 29, 1996
    Date of Patent: August 11, 1998
    Assignee: LSI Logic Corporation
    Inventor: Scott Kirkman
  • Patent number: 5337614
    Abstract: A reliable, repeatable, well-characterized, safe technique for testing the mounting integrity of heat sinks adhered to semiconductor packages is disclosed. Generally, a semiconductor package is secured in a tensiometer, the heat sink is clamped and secured to the spindle of the tensiometer, and a stud-pull type test is conducted.
    Type: Grant
    Filed: August 20, 1992
    Date of Patent: August 16, 1994
    Assignee: LSI Logic Corporation
    Inventors: Xin H. Jiang, Scott Kirkman