Patents by Inventor Scott Kirvan

Scott Kirvan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12608239
    Abstract: Systems and methods are provided for controlling load on a server hosting block storage volumes by dynamically controlling latency for input/output (I/O) operations to the block storage volumes. The system can selectively inject synthetic latency into the I/O operations according to how the server is loaded, thus enabling control of server load. For example, when the server is overloaded, additional synthetic latency can be injected into I/O operations to counteract overloading. This synthetic latency can then be removed when the server is no longer overloaded. Modifications of synthetic latency can be targeted to individual clients, individual types of I/O operations, or both, facilitating targeted performance shaping for servers hosting block storage volumes.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: April 21, 2026
    Assignee: Amazon Technologies, Inc.
    Inventors: Sriram Venugopal, Andrew Boyer, Mark Robinson, Aravinda Venkatramana, Harshi Priya Yarragonda, Abhimanyu Agarwal, Scott Kirvan
  • Patent number: 10042651
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to store a first set of instructions in a first portion of the non-volatile memory, the first set of instructions to configure a second portion of the non-volatile memory, cause the processing unit to process the first set of instructions to configure the second portion with one or more regions, and cause a configuration of the memory controller based on the first set of instructions.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: August 7, 2018
    Assignee: INTEL CORPORATION
    Inventors: Scott Kirvan, Thomas Slaight
  • Publication number: 20170147361
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to store a first set of instructions in a first portion of the non-volatile memory, the first set of instructions to configure a second portion of the non-volatile memory, cause the processing unit to process the first set of instructions to configure the second portion with one or more regions, and cause a configuration of the memory controller based on the first set of instructions.
    Type: Application
    Filed: November 24, 2015
    Publication date: May 25, 2017
    Inventors: SCOTT KIRVAN, THOMAS SLAIGHT
  • Patent number: 7568069
    Abstract: Disclosed is a method for creating a large-scale storage array by combining multiple mid-range storage arrays via a host based aggregation engine software application. Each mid-range storage array, also call a storage building block, consists of one or more RAID volumes. Each mid-range storage array has equivalent configuration and property settings including number of drives, RAID level, volume segment sizes, and volume cache settings, but not including the volume label. The complex combination of mid-range storage arrays appears as a single storage system to a data management application of a host computer system. Once the mid-range storage arrays are aggregated into a large-scale storage array, or storage complex array, common features may be modified as a collection of items so that a common modification need only be entered one time for all items in the collection.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: July 28, 2009
    Assignee: LSI Corporation
    Inventors: Ray Jantz, Juan Gatica, Scott Kirvan, Gary Steffens
  • Publication number: 20070028043
    Abstract: Disclosed is a method for creating a large-scale storage array by combining multiple mid-range storage arrays via a host based aggregation engine software application. Each mid-range storage array, also call a storage building block, consists of one or more RAID volumes. Each mid-range storage array has equivalent configuration and property settings including number of drives, RAID level, volume segment sizes, and volume cache settings, but not including the volume label. The complex combination of mid-range storage arrays appears as a single storage system to a data management application of a host computer system. Once the mid-range storage arrays are aggregated into a large-scale storage array, or storage complex array, common features may be modified as a collection of items so that a common modification need only be entered one time for all items in the collection.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Ray Jantz, Juan Gatica, Scott Kirvan, Gary Steffens