Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers located one over another; a first staircase structure formed in the tiers; a second staircase structure formed in the tiers adjacent the first staircase structure, respective portions of conductive materials in the tiers forming a part of the first and second staircase structure and a part of respective control gates associated with memory cells; a first trench structure formed in the tiers adjacent the first staircase structure and the second staircase structure, the first trench structure including length in a direction from the first staircase structure to the second staircase structure; and a second trench structure formed in the tiers adjacent the first trench structure, the second trench structure including a length in the direction from the first staircase structure to the second staircase structure.

Abstract: A microelectronic device comprises semiconductive pillar structures each individually comprising a digit line contact region disposed laterally between two storage node contact regions. At least one semiconductive pillar structure of the semiconductive pillar structures comprises a first end portion comprising a first storage node contact region, a second end portion comprising a second storage node contact region, and a middle portion between the first end portion and the second end portion and comprising a digit line contact region, a longitudinal axis of the first end portion oriented at an angle with respect to a longitudinal axis of the middle portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: Microelectronic devices include a tiered stack comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A stadium within the tiered stack includes a staircase with steps at ends of some of the tiers. The steps each have a tread provided by an upper surface portion of one of the conductive structures. Conductive contact structures extend to one of the steps and include a first conductive contact structure terminating at the tread of the step and a second conductive contact structure extending through the tread of the step. Related fabrication methods and electronic systems are also disclosed.

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation.

Abstract: A microelectronic device comprises memory cell structures extending from a base material. At least one memory cell structure of the memory cell structures comprises a central portion in contact with a digit line, extending from the base material and comprising opposing arcuate surfaces, an end portion in contact with a storage node contact on a side of the central portion, and an additional end portion in contact with an additional storage node contact on an opposite side of the central portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A microelectronic device comprises a semiconductive pillar structure comprising a central portion, a first end portion, and a second end portion on a side of the central portion opposite the first end portion, the first end portion oriented at an angle with respect to the central portion and extending substantially parallel to the second end portion, a digit line contact on the central portion of the semiconductive pillar structure, a first storage node contact on the first end portion, and a second storage node contact on the second end portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.

Abstract: A microelectronic device comprises semiconductive pillar structure comprising a central portion, a first end portion, and a second end portion on a side of the central portion opposite the first end portion, the first end portion oriented at an angle with respect to the central portion and extending substantially parallel to the second end portion, a digit line contact on the central portion of the semiconductive pillar structure, a first storage node contact on the first end portion, and a second storage node contact on the second end portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A microelectronic device comprises semiconductive pillar structures each individually comprising a digit line contact region disposed laterally between two storage node contact regions. At least one semiconductive pillar structure of the semiconductive pillar structures comprises a first end portion comprising a first storage node contact region, a second end portion comprising a second storage node contact region, and a middle portion between the first end portion and the second end portion and comprising a digit line contact region, a longitudinal axis of the first end portion oriented at an angle with respect to a longitudinal axis of the middle portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.

Abstract: A semiconductor device comprises conductive lines, a conductive landing pad in electrical communication with a conductive line of the conductive lines, and a conductive interconnect structure in electrical communication with the conductive landing pad. The conductive interconnect structure comprises a contact plug in electrical communication with the conductive landing pad, and a global interconnect contact in electrical communication with the contact plug and having a greater lateral width than the contact plug. Related electronic systems and method are also disclosed.

Abstract: A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.

Abstract: A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation.

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation.

Abstract: A semiconductor device comprises conductive lines, a conductive landing pad in electrical communication with a conductive line of the conductive lines, and a conductive interconnect structure in electrical communication with the conductive landing pad. The conductive interconnect structure comprises a contact plug in electrical communication with the conductive landing pad, and a global interconnect contact in electrical communication with the contact plug and having a greater lateral width than the contact plug. Related electronic systems and method are also disclosed.

Abstract: A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.

Abstract: A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation.

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation.