Abstract: Binary files in an executable file system can be directly executed by the central processing unit at the location in which the binary files are stored. A pre-runtime tool can traverse a replica directory hierarchy in a host/loading computer to fill an internal data structure which can be used to generate a binary file that can be loaded directly into the embedded computer. The central processing unit (CPU) and its components such as the address bus, data bus, and program counter, can directly interact with unit of storage interface mechanisms, such as read/write means, identifying location means, and concatenation means. In some embodiments, the page size in the memory management unit (MMU) of the CPU is set to the same size as the unit of storage.

Abstract: Binary files in an executable file system can be directly executed by the central processing unit at the location in which the binary files are stored. A pre-runtime tool can traverse a replica directory hierarchy in a host/loading computer to fill an internal data structure which can be used to generate a binary file that can be loaded directly into the embedded computer. The central processing unit (CPU) and its components such as the address bus, data bus, and program counter, can directly interact with unit of storage interface mechanisms, such as read/write means, identifying location means, and concatenation means. In some embodiments, the page size in the memory management unit (MMU) of the CPU is set to the same size as the unit of storage.

Abstract: A data processing system having a mathematically consistent condition code architecture is disclosed for implementing single instruction range checking and limiting operations. The data processing system includes condition code flags that are set to provide indications of the occurrence of arithmetic overflow and the direction of the arithmetic overflow for all of the possible arithmetic operations that can be performed by an arithmetic logic unit within the digital processing system. Based upon the indicated occurrence of arithmetic overflow and the direction of the overflow, the numeric value of a software variable generated by one of the arithmetic operations is limited to an appropriate upper or lower bound of a predetermined range of acceptable values, if the numeric value was generated with the occurrence of arithmetic overflow, or the numeric value was generated without the occurrence of overflow, but was outside of the acceptable range of values.

Abstract: A single integrated circuit operable in either a single chip mode or a host dependent mode.