Patents by Inventor Scott Lunning

Scott Lunning has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8159030
    Abstract: An MOS device having enhanced mobility and a method for its fabrication are provided. The method comprises providing a P-type monocrystalline silicon germanium substrate having a first lattice constant and a channel region at the substrate surface, forming a gate insulator layer on the substrate, forming a gate electrode having a first sidewall and a second sidewall overlying the channel. First and second recesses are etched into the substrate in alignment with the first and the second gate electrode sidewalls, respectively. The recesses are filled by epitaxially growing a layer of embedded monocrystalline semiconductor material characterized by a second lattice constant less than the first lattice constant to impart a tensile strain on the channel region.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: April 17, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Andrew Michael Waite, Scott Lunning
  • Patent number: 6933620
    Abstract: An insulated gate semiconductor device (100) having reduced gate resistance and a method for manufacturing the semiconductor device (100). A gate structure (112) is formed on a major surface (104) of a semiconductor substrate (102). Successive nitride spacers (118, 128) are formed adjacent the sidewalls of the gate structure (112). The nitride spacers (118, 128) are etched and recessed using a single etch to expose the upper portions (115A, 117A) of the gate structure (112). Source (132) and drain (134) regions are formed in the semiconductor substrate (102). Silicide regions (140, 142, 144) are formed on the top surface (109) and the exposed upper portions (115A, 117A) of the gate structure (112) and the source region (132) and the drain region (134). Electrodes (150, 152, 154) are formed in contact with the silicide (140, 142, 144) of the respective gate structure (112), source region (132), and the drain region (134).
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: August 23, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Scott Lunning, Karsten Wieczorek, Thorsten Kammler