Patents by Inventor Scott M. Burkart

Scott M. Burkart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139497
    Abstract: Various aspects of the present disclosure are directed toward implantable medical devices, systems, and methods for cardiac assistance.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventors: Scott M. Bryson, Dustin C. Burkart, Zachary A. Crannell, Joshua D. Cross, Robert M. Depue, James L. Goepfrich, Paul D. Goodman, Brandon C. Hedberg, Jason D. Hemmer, Jeffrey Kennington, Elton R. Migliati, Bryan Reep, Edward E. Shaw, James D. Silverman, Richard D. Strones
  • Patent number: 8456282
    Abstract: An adaptive wakeup methodology may be implemented to allow an radio frequency identification (RFID) tag to stay synchronized with periodic radio frequency (RF) interrogator polling signal while at the same time optimizing power consumption. A receiver (or transceiver) component of a RFID tag may only be operated when an interrogator polling signal is expected, and in a manner that reduces the amount of time between when the receiver or transceiver is turned on and when the interrogator polling signal is received (i.e., the receive buffer time). At other times, the RFID tag may be placed in a low power consumption sleep state. The amount of time that the RFID tag spends in such a low power sleep state before waking and receiving the following interrogator polling signal may also be optionally adjusted, e.g., to fit characteristics of a given situation and/or to re-synchronize a given aRFID tag with first band transmissions from an aRFIDI.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: June 4, 2013
    Assignee: L-3 Communications Integrated Systems L.P.
    Inventors: Scott M. Burkart, Jonathan E. Brown
  • Patent number: 8401050
    Abstract: RF sampling receivers are disclosed that employ multiple sampling clocks to produce multiple projections. In operation, a Nyquist folded receiver (NYFR) may be implemented that utilizes at least one modulated sampling clock in combination with one or more other modulated or non-modulated sampling clocks to identify received signals. In such an embodiment, one or more clock modulations may be used to induce frequency modulations that are Nyquist zone dependent, and multiple Nyquist zones may be aliased together while still allowing for signals from different Nyquist zones to be separated and identified.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: March 19, 2013
    Assignee: L-3 Communications Integrated Systems L.P.
    Inventors: Gerald L. Fudge, Scott M. Burkart, Antone L. Kusmanoff
  • Patent number: 8368513
    Abstract: Systems and methods for data separation, which may be employed to receive and process RFID tag data in RF signal environments where multiple RFID tags are tracked, localized and/or employed to transmit information. The disclosed systems and methods may be implemented for data separation in a high density aRFID environment using RFID tags in combination with spatial and/or frequency separation.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: February 5, 2013
    Assignee: L-3 Communications Integrated Systems L.P.
    Inventors: Jonathan E. Brown, Scott M. Burkart
  • Patent number: 8175095
    Abstract: Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Dynamically-sized data packets, sized in accordance with the amount of data ready to be sent, are transferred between the devices and/or interfaces on the card.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: May 8, 2012
    Assignee: L3 Communications Integrated Systems, L.P.
    Inventors: Joshua D. Anderson, Scott M. Burkart, Matthew P. DeLaquil, Deepak Prasanna
  • Publication number: 20100277286
    Abstract: An adaptive wakeup methodology may be implemented to allow an radio frequency identification (RFID) tag to stay synchronized with periodic radio frequency (RF) interrogator polling signal while at the same time optimizing power consumption. A receiver (or transceiver) component of a RFID tag may only be operated when an interrogator polling signal is expected, and in a manner that reduces the amount of time between when the receiver or transceiver is turned on and when the interrogator polling signal is received (i.e., the receive buffer time). At other times, the RFID tag may be placed in a low power consumption sleep state. The amount of time that the RFID tag spends in such a low power sleep state before waking and receiving the following interrogator polling signal may also be optionally adjusted, e.g., to fit characteristics of a given situation and/or to re-synchronize a given aRFID tag with first band transmissions from an aRFIDI.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Scott M. Burkart, Jonathan E. Brown
  • Publication number: 20100277280
    Abstract: Data from one or more sensors may be collected using a first band of a multi-band RFID tag device and then passed on to a remote receiver from the RFID tag device using a second RF band. This capability may be employed to allow a first band-equipped RFID tag to collect data from local sensors, and then to report that data over a second band link, allowing the RFID tag device to function as an intermediary bridge device or relay between the sensor/s and a remote receiver and/or tag interface device. Such a remote receiver may further be in communication with a remote network so that the RFID tag device acts to bridge local sensor data to a remote network, where it may be further processed aid/or accessed by one or more users. The RFID tag device may also be interactive in nature, meaning that the tag data storage and/or the tag's operation is reprogrammable in the operational environment.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Scott M. Burkart, Ken A. Stroud, Jonathan E. Brown, James K. Burgess, III
  • Publication number: 20100277285
    Abstract: Communication between a multi-band RFID tag device that communicates on first and second bands with other devices may be enabled, using a bidirectional communication bridging device that converts first band signals of the RFID tag device to third band signals of another device, and vice-versa. Examples of third band-capable devices that may be bridged for communication with the first band of a RFID tag device include WiFi devices such as smart phone, notebook computer, WLAN router or any other type of WiFi enabled device. In one example, a tag interface control device may be provided in the form of a WiFi-enabled handheld unit that communicates with a multi-band RFID tag through a bridging device using NBFM radio frequency (RF) communications to retrieve or change stored data and/or change the tag operation. Such a WiFi-enabled handheld unit may be configured to be relatively small, portable, and/or battery or wireless-powered.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Joshua D. Anderson, Scott M. Burkart, Jonathan E. Brown, Michael R. Custer, James K. Burgess, III
  • Publication number: 20100277284
    Abstract: Systems and methods for data separation, which may be employed to receive and process RFID tag data in RF signal environments where multiple RFID tags are tracked, localized and/or employed to transmit information. The disclosed systems and methods may be implemented for data separation in a high density aRFID environment using RFID tags in combination with spatial and/or frequency separation.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Jonathan E. Brown, Scott M. Burkart
  • Publication number: 20100277283
    Abstract: A RFID tag system may be configured as a tag having a first band (e.g., multiple channel-based NBFM frequency band) transceiver to allow field programmability of tag behavior and onboard tag data. The RFID tag system may be configured to collect data from one or more local sensors through the first band link and store data points of interest in tag onboard storage. The RFID tag system may be configured to work in conjunction with a remote interrogating unit, and a handheld device or other local interrogating unit may be additionally or alternatively provided to communicate with such aRFID tag. Data that is stored on the RFID tag may be retrieved or changed, and/or the operation of the tag may be modified.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Scott M. Burkart, Ken A. Stroud, Joshua D. Anderson, Mark A. Chivers, Sujit Ravindran, Ross A. McClain, JR., Jonathan E. Brown, James K. Burgess, III
  • Publication number: 20100169403
    Abstract: A system for solving large-scale matrix equations comprises a plurality of field programmable gate arrays (FPGAs), a plurality of memory elements, a plurality of memory element controllers, and a plurality of processing elements. The FPGAs may include a plurality of configurable logic elements and a plurality of configurable storage elements. The memory elements may be accessible by the FPGAs and may store a matrix and a first vector. The memory element controllers may be formed from configurable logic elements and configurable storage elements and may supply at least a portion of a row of the matrix and at least a portion of the first vector. Each processing element may receive at least the row of the matrix and the first vector and solve an iteration for one element of the first vector.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P.
    Inventors: Matthew P. DeLaquil, Deepak Prasanna, Scott M. Burkart, Joshua D. Anderson, Aya Nagao Bennett
  • Publication number: 20100157854
    Abstract: Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Dynamically-sized data packets, sized in accordance with the amount of data ready to be sent, are transferred between the devices and/or interfaces on the card.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 24, 2010
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P.
    Inventors: Joshua D. Anderson, Scott M. Burkart, Matthew P. DeLaquil, Deepak Prasanna