Patents by Inventor Scott Mathews

Scott Mathews has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6233652
    Abstract: The invention provides for a content addressable memory (CAM). The CAM includes an input port and a plurality of locations to store page addresses for comparing to an address received from the input port. Each location includes a plurality of lower cells and at least one page size mask cell to send signals to an associated one of the lower cells. The associated one of the lower cells produces a match signal in response to either the page size cell sending a mask signal or to the portion page address stored therein matching a corresponding portion of the address received from the input port. Each location produces a match signal in response to each cell therein producing a match signal. The invention provides for a method of translating logical to physical addresses.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: May 15, 2001
    Assignee: Intel Corporation
    Inventors: Gregory Scott Mathews, Jarvis Leung
  • Patent number: 6223263
    Abstract: A method and apparatus for managing a memory region that stores locked and unlocked data. Data stored in the memory region is accessed. The data has an associated index that is stored in a locked index queue. While the index is stored in the locked index queue, the data is locked.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: April 24, 2001
    Assignee: Intel Corporation
    Inventors: Gregory Scott Mathews, Selina Sze Wan Yuen
  • Patent number: 6134636
    Abstract: A method and apparatus for storing, locking, and unlocking data in a memory array. The memory array includes a first line to store a first type of data while the first line is unlocked during a first period of time and to store a second type of data while the first line is locked during a subsequent second period of time. The memory array further includes a second line to store the second type of data while the second line is locked during the first period of time and to store the first type of data while the second line is unlocked during the second period of time.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: October 17, 2000
    Assignee: Intel Corporation
    Inventors: Gregory Scott Mathews, John Wai Cheong Fu, Dean Ahmad Mulla