Patents by Inventor Scott McGrath

Scott McGrath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11959841
    Abstract: A device and method for isolating extracellular vesicles from biofluids is disclosed. A nanoporous silicon nitride membrane is provided with a tangential flow of biofluid. A pressure gradient through the nanoporous silicon nitride membrane facilitates capture of extracellular vesicles from the tangential flow vector of biofluid. Reversal of the pressure gradient results in the release of the extracellular vesicles for subsequent collection.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: April 16, 2024
    Assignee: UNIVERSITY OF ROCHESTER
    Inventors: James Lionel McGrath, Kilean Scott Lucas, Henry Hung Li Chung
  • Publication number: 20240104003
    Abstract: An integration application comprising a plurality of components may be provided. The components may provide connections between systems. The integration application may be configured to allow the systems to exchange data. It may be determined that a new version of a first one of the components is a candidate for release. Prior to release of the new version of the first component, the integration application may be tested using the new version of the first component and an existing version of the first component. An instance of the integration application may be automatically caused to be upgraded to include the new version of the first component.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Applicant: Salesforce, Inc.
    Inventors: Santosh Mankala, Carlos Santiago Yanzon, Jose Sabino, Keith McGrath, Nimit Goyal, Prince Surana, Wassim Melakhessou, Scott Glaser, Siddharth Balireddy, Tarun Kale
  • Publication number: 20230077846
    Abstract: A pre-startup control method for a boiler or water heater includes: providing a controller operatively coupled to a boiler or water heater unit; performing a unit shutdown operation; enabling a pre-start up mode; at about a same time or in any order, moving an air fuel valve by a controller to a non-off position with a gas supply to the water heater or boiler turned off, wherein the controller turns on a blower at an operational level, and causes an ignitor to spark; and displaying parameters which allow an affirmation of a safe and reliable ignition prior to a gas turn on of the boiler or water heater unit. A flow balancing method and a programmed auto run method are also described.
    Type: Application
    Filed: November 17, 2022
    Publication date: March 16, 2023
    Inventors: Kunal Shah, Nery Hernandez, Scott McGrath, Joseph Bentitou
  • Patent number: 11549681
    Abstract: A pre-startup control method for a boiler or water heater includes: providing a controller operatively coupled to a boiler or water heater unit; performing a unit shutdown operation; enabling a pre-start up mode; at about a same time or in any order, moving an air fuel valve by a controller to a non-off position with a gas supply to the water heater or boiler turned off, wherein the controller turns on a blower at an operational level, and causes an ignitor to spark; and displaying parameters which allow an affirmation of a safe and reliable ignition prior to a gas turn on of the boiler or water heater unit. A flow balancing method and a programmed auto run method are also described.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: January 10, 2023
    Inventors: Kunal Shah, Nery Hernandez, Scott McGrath, Joseph Bentitou
  • Publication number: 20200348017
    Abstract: A pre-startup control method for a boiler or water heater includes: providing a controller operatively coupled to a boiler or water heater unit; performing a unit shutdown operation; enabling a pre-start up mode; at about a same time or in any order, moving an air fuel valve by a controller to a non-off position with a gas supply to the water heater or boiler turned off, wherein the controller turns on a blower at an operational level, and causes an ignitor to spark; and displaying parameters which allow an affirmation of a safe and reliable ignition prior to a gas turn on of the boiler or water heater unit. A flow balancing method and a programmed auto run method are also described.
    Type: Application
    Filed: April 29, 2020
    Publication date: November 5, 2020
    Inventors: Kunal Shah, Nery Hernandez, Scott McGrath, Joseph Bentitou
  • Publication number: 20190128997
    Abstract: An access point may include a radio. The radio may receive a waveform, and the waveform may comprise a plurality of pulses. The access point may further include a hardware processor coupled to the radio. The hardware processor may determine a model of the received waveform. Determining a model of the received waveform may include extracting a plurality of characteristics corresponding to the received waveform, determining a plurality of parameters, wherein each of the plurality of parameters is based on a corresponding characteristic of the plurality of characteristics, and constructing an output waveform model based on the plurality of parameters, wherein the output waveform model corresponds to the received waveform. The hardware processor may further transmit the output waveform model to the hardware processor as an input waveform, wherein the input waveform is to tune the model.
    Type: Application
    Filed: October 27, 2017
    Publication date: May 2, 2019
    Inventors: Andre Beaudin, Gilbert Moineau, Scott McGrath
  • Patent number: 10254386
    Abstract: An access point may include a radio. The radio may receive a waveform, and the waveform may comprise a plurality of pulses. The access point may further include a hardware processor coupled to the radio. The hardware processor may determine a model of the received waveform. Determining a model of the received waveform may include extracting a plurality of characteristics corresponding to the received waveform, determining a plurality of parameters, wherein each of the plurality of parameters is based on a corresponding characteristic of the plurality of characteristics, and constructing an output waveform model based on the plurality of parameters, wherein the output waveform model corresponds to the received waveform. The hardware processor may further transmit the output waveform model to the hardware processor as an input waveform, wherein the input waveform is to tune the model.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: April 9, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Andre Beaudin, Gilbert Moineau, Scott McGrath
  • Patent number: 10062099
    Abstract: According to one embodiment of the invention, a system for creating a virtual shopping cart based on location information embedded in an image and the results of image recognition performed on the image is described. One embodiment of the system comprises an access point comprising a hardware processor wherein the system is configured to perform operations comprising: obtaining a first image, of a particular product, taken by a device operated by a user, identifying a first physical location of the device when the image was taken by the device, based on the first physical location, filtering a set of images corresponding to a plurality of products to obtain a first subset of images that are stored in association with the first physical location, and comparing the first image to the first subset of images to identify a product, from the plurality of products, that matches the particular product.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: August 28, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Scott McGrath
  • Patent number: 9859234
    Abstract: A method of processing an interconnection element can include providing a substrate element having front and rear opposite surfaces and electrically conductive structure, a first dielectric layer overlying the front surface and a plurality of conductive contacts at a first surface of the first dielectric layer, and a second dielectric layer overlying the rear surface and having a conductive element at a second surface of the second dielectric layer. The method can also include removing a portion of the second dielectric layer so as to reduce the thickness of the portion, and to provide a raised portion of the second dielectric layer having a first thickness and a lowered portion having a second thickness. The first thickness can be greater than the second thickness. At least a portion of the conductive element can be recessed below a height of the first thickness of the second dielectric layer.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: January 2, 2018
    Assignee: Invensas Corporation
    Inventors: Cyprian Emeka Uzoh, Guilian Gao, Bongsub Lee, Scott McGrath, Hong Shen, Charles G. Woychik, Arkalgud R. Sitaram, Akash Agrawal
  • Patent number: 9824999
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: November 21, 2017
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Patent number: 9825002
    Abstract: A microelectronic assembly includes a stack of semiconductor chips each having a front surface defining a respective plane of a plurality of planes. A chip terminal may extend from a contact at a front surface of each chip in a direction towards the edge surface of the respective chip. The chip stack is mounted to substrate at an angle such that edge surfaces of the chips face a major surface of the substrate that defines a second plane that is transverse to, i.e., not parallel to the plurality of parallel planes. An electrically conductive material electrically connects the chip terminals with corresponding substrate contacts.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: November 21, 2017
    Assignee: Invensas Corporation
    Inventors: Rajesh Katkar, Reynaldo Co, Scott McGrath, Ashok S. Prabhu, Sangil Lee, Liang Wang, Hong Shen
  • Patent number: 9659848
    Abstract: A component can include a generally planar element, a reinforcing dielectric layer overlying the generally planar element, an encapsulation overlying the reinforcing dielectric layer, and a plurality of wire bonds. Each wire bond can have a tip at a major surface of the encapsulation. The wire bonds can have first portions extending within the reinforcing dielectric layer. The first portions of at least some of the wire bonds can have bends that change an extension direction of the respective wire bond. The reinforcing dielectric layer can have protruding regions surrounding respective ones of the wire bonds, the protruding regions extending to greater peak heights from the first surface of the generally planar element than portions of the reinforcing dielectric layer between adjacent ones of the protruding regions. The peak heights of the protruding regions can coincide with points of contact between the reinforcing dielectric layer and individual wire bonds.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 23, 2017
    Assignee: Invensas Corporation
    Inventors: Grant Villavicencio, Sangil Lee, Roseann Alatorre, Javier A. Delacruz, Scott McGrath
  • Publication number: 20170141020
    Abstract: A component can include a generally planar element, a reinforcing dielectric layer overlying the generally planar element, an encapsulation overlying the reinforcing dielectric layer, and a plurality of wire bonds. Each wire bond can have a tip at a major surface of the encapsulation. The wire bonds can have first portions extending within the reinforcing dielectric layer. The first portions of at least some of the wire bonds can have bends that change an extension direction of the respective wire bond. The reinforcing dielectric layer can have protruding regions surrounding respective ones of the wire bonds, the protruding regions extending to greater peak heights from the first surface of the generally planar element than portions of the reinforcing dielectric layer between adjacent ones of the protruding regions. The peak heights of the protruding regions can coincide with points of contact between the reinforcing dielectric layer and individual wire bonds.
    Type: Application
    Filed: March 31, 2016
    Publication date: May 18, 2017
    Inventors: Grant Villavicencio, Sangil Lee, Roseann Alatorre, Javier A. Delacruz, Scott McGrath
  • Publication number: 20170040270
    Abstract: A method of processing an interconnection element can include providing a substrate element having front and rear opposite surfaces and electrically conductive structure, a first dielectric layer overlying the front surface and a plurality of conductive contacts at a first surface of the first dielectric layer, and a second dielectric layer overlying the rear surface and having a conductive element at a second surface of the second dielectric layer. The method can also include removing a portion of the second dielectric layer so as to reduce the thickness of the portion, and to provide a raised portion of the second dielectric layer having a first thickness and a lowered portion having a second thickness. The first thickness can be greater than the second thickness. At least a portion of the conductive element can be recessed below a height of the first thickness of the second dielectric layer.
    Type: Application
    Filed: August 6, 2015
    Publication date: February 9, 2017
    Inventors: Cyprian Emeka Uzoh, Guilian Gao, Bongsub Lee, Scott McGrath, Hong Shen, Charles G. Woychik, Arkalgud R. Sitaram, Akash Agrawal
  • Publication number: 20170018529
    Abstract: A microelectronic assembly includes a stack of semiconductor chips each having a front surface defining a respective plane of a plurality of planes. A chip terminal may extend from a contact at a front surface of each chip in a direction towards the edge surface of the respective chip. The chip stack is mounted to substrate at an angle such that edge surfaces of the chips face a major surface of the substrate that defines a second plane that is transverse to, i.e., not parallel to the plurality of parallel planes. An electrically conductive material electrically connects the chip terminals with corresponding substrate contacts.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 19, 2017
    Inventors: Rajesh Katkar, Reynaldo Co, Scott McGrath, Ashok S. Prabhu, Sangil Lee, Liang Wang, Hong Shen
  • Patent number: 9508689
    Abstract: Methods for forming connectors on die pads at a wafer level of processing include forming spots of a curable electrically conductive material over die pads and extending to or over the interconnect die edge; curing the conductive material; and in a wafer cutting procedure thereafter severing the spots. Also, die pad to z-interconnect connectors formed by the methods, and shaped and dimensioned accordingly. Also, stacked die assemblies and stacked die packages containing die prepared according to the methods and having die pad to z-interconnect connectors formed by the methods and shaped and dimensioned accordingly.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: November 29, 2016
    Assignee: Invensas Corporation
    Inventors: Reynaldo Co, Jeffrey S. Leal, Suzette K. Pangrle, Scott McGrath, De Ann Eileen Melcher, Keith L. Barrie, Grant Villavicencio, Elmer M. Del Rosario, John R. Bray
  • Patent number: 9503915
    Abstract: A method includes steering client devices to access points that potentially increase capacity of communications using beamformed transmissions. In particular, this includes determining the best access points for beamforming to a particular client or a group of clients in the network for an improved throughput performance in the deployment or a subset of access points.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: November 22, 2016
    Assignee: Aruba Networks, Inc.
    Inventors: Kalyan Dharanipragada, Gautam D. Bhanage, Venkatesh Kannan, Sachin Ganu, Scott McGrath
  • Patent number: 9438496
    Abstract: The present disclosure discloses a system and method for monitoring link quality between internetworking devices. The system includes a processor and a memory storing instructions that, when executed, cause the system to: generate, at a first internetworking device, a marker-request packet that includes a current marker ID; send, from the first internetworking device, the marker-request packet to a second internetworking device; receive, at the first internetworking device, a marker-reply packet that responds to the marker-request packet from the second internetworking device, the marker-reply packet including the current marker ID and a previous marker ID; and determine, at the first network device, a link quality between the first internetworking device and the second internetworking device based at least in part on the marker-reply packet.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: September 6, 2016
    Assignee: Aruba Networks, Inc.
    Inventors: Gopalakrishna Raman, Kiranmaye Sirigineni, Neal Castagnoli, Rajini Balay, Scott McGrath
  • Publication number: 20160104689
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Application
    Filed: December 15, 2015
    Publication date: April 14, 2016
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Patent number: 9252116
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: February 2, 2016
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson