Patents by Inventor Scott Mokler

Scott Mokler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250089312
    Abstract: Gate-all-around integrated circuit structures having differential nanowire thickness and gate oxide thickness, and methods of fabricating gate-all-around integrated circuit structures having differential nanowire thickness and gate oxide thickness, are described. For example, an integrated circuit structure includes a nanowire with an outer thickness and an inner thickness, the inner thickness less than the outer thickness. The nanowire tapers from outer regions having the outer thickness to an inner region having the inner thickness. A dielectric material is on and surrounding the nanowire such that a combined thickness of the nanowire and the dielectric material in the inner region is approximately the same as the outer thickness of the nanowire.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Rahul RAMASWAMY, Marko RADOSAVLJEVIC, Walid M. HAFEZ, Hsu-Yu CHANG, Jeong Dong KIM, Scott MOKLER
  • Patent number: 10548249
    Abstract: Disclosed herein are arrangements for shielding in electronic assemblies, as well as related methods and devices. In some embodiments, an electronic assembly may include a circuit board having a first face and a second opposing face, and a shield coupled to the second face of the circuit board. The circuit board may have a hole extending therethrough, and the shield may extend into the hole towards the first face.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: January 28, 2020
    Assignee: Intel Corporation
    Inventors: Scott Mokler, Timothy Swettlen, Kevin Byrd
  • Publication number: 20190221456
    Abstract: Embodiments include a paste transfer tool (PTT), a semiconductor package, and a method of forming the semiconductor package with the paste transfer tool. The PTT includes a top surface and a bottom surface. The PTT also includes one or more pins, where each pin has a first end and a second end, and where the first end is disposed on the body and the second end has a nozzle tip. The method of forming the semiconductor package includes dipping the nozzle tip of the PTT in a paste reservoir to form paste dots on the nozzle tip; disposing the paste dots on one or more pads of a substrate with the PTT; and forming one or more bumps from the on paste dots on the one or more pads of the substrate, where the pads of the substrate are positioned on one or more regions of the substrate.
    Type: Application
    Filed: January 12, 2018
    Publication date: July 18, 2019
    Inventors: Dudi AMIR, Scott MOKLER
  • Publication number: 20190098802
    Abstract: Disclosed herein are arrangements for shielding in electronic assemblies, as well as related methods and devices. In some embodiments, an electronic assembly may include a circuit board having a first face and a second opposing face, and a shield coupled to the second face of the circuit board. The circuit board may have a hole extending therethrough, and the shield may extend into the hole towards the first face.
    Type: Application
    Filed: September 27, 2017
    Publication date: March 28, 2019
    Applicant: Intel Corporation
    Inventors: Scott Mokler, Timothy Swettlen, Kevin Byrd