Abstract: A system and method are provided for passing a data file from a software utility to a service processor. The method includes loading, using a processor, an interrupt handler and runtime code during initialization of a computer before booting an operating system; requesting, using a processor, that the operating system transfer a data file via an interface; and transferring, using a processor, the data file to an area accessible to the runtime code. The method further includes requesting, using a processor, that the interrupt handler pass the data file to a service processor. Still further, the method includes passing, using a processor, the data file from the accessible area to the service processor via a memory-mapped input/output window of the service processor, wherein the data file is transferred to the service processor without waiting for a system reboot.

Abstract: Systems and methods for performing operations on memory of a computing device are disclosed. According to an aspect, a method includes storing update data on a first memory of a computing device, wherein the update data comprises data for updating a second memory on the computing device. The method also includes initiating an update mode on the second memory. Further, the method includes suspending an I/O operation of the second memory. The method also includes switching the computing device to a system management mode (SMM) while the second memory is in the update mode. Further, the method includes retrieving the update data from the first memory. The method also includes determining whether the update data is valid. The method also includes resuming the I/O operation of the second memory for updating the second memory based on the retrieved update data in response to determining that the update data is valid.

Abstract: A system and method are provided for passing a data file from a software utility to a service processor. The method includes loading, using a processor, an interrupt handler and runtime code during initialization of a computer before booting an operating system; requesting, using a processor, that the operating system transfer a data file via an interface; and transferring, using a processor, the data file to an area accessible to the runtime code. The method further includes requesting, using a processor, that the interrupt handler pass the data file to a service processor. Still further, the method includes passing, using a processor, the data file from the accessible area to the service processor via a memory-mapped input/output window of the service processor, wherein the data file is transferred to the service processor without waiting for a system reboot.

Abstract: Methods, apparatuses, and computer program products for correcting a failure associated with a current firmware image are provided. Embodiments include a firmware selection module detecting the failure associated with the current firmware image stored in firmware memory corresponding to a component of a system. Embodiments also include the firmware selection module selecting from a plurality of backup firmware images, a replacement firmware image based on a status of at least one backup firmware image in response to detecting the failure. Embodiments also include the firmware selection module storing the selected replacement firmware image in the firmware memory.

Abstract: Systems and methods for performing operations on memory of a computing device are disclosed. According to an aspect, a method includes storing update data on a first memory of a computing device, wherein the update data comprises data for updating a second memory on the computing device. The method also includes initiating an update mode on the second memory. Further, the method includes suspending an I/O operation of the second memory. The method also includes switching the computing device to a system management mode (SMM) while the second memory is in the update mode. Further, the method includes retrieving the update data from the first memory. The method also includes determining whether the update data is valid. The method also includes resuming the I/O operation of the second memory for updating the second memory based on the retrieved update data in response to determining that the update data is valid.

Abstract: Methods, apparatuses, and computer program products for correcting a failure associated with a current firmware image are provided. Embodiments include a firmware selection module detecting the failure associated with the current firmware image stored in firmware memory corresponding to a component of a system. Embodiments also include the firmware selection module selecting from a plurality of backup firmware images, a replacement firmware image based on a status of at least one backup firmware image in response to detecting the failure. Embodiments also include the firmware selection module storing the selected replacement firmware image in the firmware memory.

Abstract: Methods, apparatuses, and computer program products for correcting a failure associated with a current firmware image are provided. Embodiments include a firmware selection module detecting the failure associated with the current firmware image stored in firmware memory corresponding to a component of a system. Embodiments also include the firmware selection module selecting from a plurality of backup firmware images, a replacement firmware image based on a status of at least one backup firmware image in response to detecting the failure. Embodiments also include the firmware selection module storing the selected replacement firmware image in the firmware memory.

Abstract: In an embodiment, a translation of a hierarchical bus number to a physical bus number and a bridge identifier of a bridge are written to a north chip. A request is received that comprises an identifier of a destination. A determination is made that the identifier comprises the hierarchical bus number. In response to the determination, the identifier of the destination is replaced in the request with the physical bus number and the bridge identifier. The request is sent to the bridge identified by the bridge identifier. A south chip comprises the bridge, and the south chip is connected to the north chip via a point-to-point serial link. The physical bus number identifies a bus that connects the bridge to a device. The request comprises a configuration write request that requests a write of data to the device.

Abstract: One embodiment provides a method of managing power in a computer system. A device of the computer system is operated at a selected power-state. The power consumption of the computer system is monitored. If the power consumption of the computer system is approaching or has exceeded a power cap selected for the computer system, then a request to reduce the power-state for the device is generated in response. The operating system is used to service the request to reduce the power-state according to the priority of the request. The reduced power state is forced out-of-band following the request to reduce the power-state if the request is not immediately serviceable by the operating system. Different approaches can be taken to force the reduced power state, using, for example, system management mode or a platform environment control interface.

Abstract: In an embodiment, a translation of a hierarchical MMIO address range to a physical MMIO address range and an identifier of a bridge in a south chip are written to a north chip. A transaction is received that comprises a hierarchical MMIO address. The hierarchical MMIO address that is within the hierarchical MMIO address range is replaced in the transaction with the identifier of the bridge and with a physical MMIO address that is within the physical MMIO address range in the south chip. The transaction is sent to the device that is connected to the bridge in the south chip. The physical MMIO address range specifies a range of physical MMIO addresses in memory in the device.

Abstract: In an embodiment, a translation of a physical bus number to a hierarchical bus number is written to a south chip. The south chip receives a configuration write command that comprises a physical bus number. The south chip sends the configuration write command to a device via the bus identified by the physical bus number, and the device stores the physical bus number in the device. In response to a received message from a device that comprises the physical bus number, the south chip replaces the physical bus number in the message with the hierarchical bus number. The south chip sends the message to a north chip via a point-to-point serial link. Both the physical bus number and the hierarchical bus number identify a bus with which the device connects to a bridge in the south chip.

Abstract: In an embodiment, a command is received that requests movement of ownership of a target device from an origin compute element to a destination compute element. From the origin compute element, a translation of a virtual bridge identifier to a first secondary bus identifier, a first subordinate bus identifier, and a first MMIO bus address range is removed. To the destination compute element, a translation of the target virtual bridge identifier to a second secondary bus identifier, a second subordinate bus identifier, and a second MMIO bus address range is added. From a south chip that comprises the target virtual bridge, a translation of the target virtual bridge identifier to an identifier of the origin compute element is removed. To the south chip, a translation of the target virtual bridge identifier to an identifier of the destination compute element is added.

Abstract: Methods, apparatus, and products for managing virtual addresses of blade servers in a data center are disclosed that include storing by a blade server management module (‘BSMM’), in non-volatile memory of a blade server, a parameter block, the parameter block including one or more virtual addresses for communications adapters of the blade server and one or more action identifiers, each action identifier representing a type of address modification; detecting, by a basic input-output system (‘BIOS’) module of the blade server upon powering on the blade server, the parameter block; and modifying, by the BIOS module of the blade server in dependence upon the one or more action identifiers of the parameter block, an address of at least one communications adapter of the blade server.

Abstract: In an embodiment, a command is received that requests movement of ownership of a target device from an origin compute element to a destination compute element. From the origin compute element, a translation of a virtual bridge identifier to a first secondary bus identifier, a first subordinate bus identifier, and a first MMIO bus address range is removed. To the destination compute element, a translation of the target virtual bridge identifier to a second secondary bus identifier, a second subordinate bus identifier, and a second MMIO bus address range is added. From a south chip that comprises the target virtual bridge, a translation of the target virtual bridge identifier to an identifier of the origin compute element is removed. To the south chip, a translation of the target virtual bridge identifier to an identifier of the destination compute element is added.

Abstract: In an embodiment, a translation of a hierarchical MMIO address range to a physical MMIO address range and an identifier of a bridge in a south chip are written to a north chip. A transaction is received that comprises a hierarchical MMIO address. The hierarchical MMIO address that is within the hierarchical MMIO address range is replaced in the transaction with the identifier of the bridge and with a physical MMIO address that is within the physical MMIO address range in the south chip. The transaction is sent to the device that is connected to the bridge in the south chip. The physical MMIO address range specifies a range of physical MMIO addresses in memory in the device.

Abstract: In an embodiment, a translation of a hierarchical bus number to a physical bus number and a bridge identifier of a bridge are written to a north chip. A request is received that comprises an identifier of a destination. A determination is made that the identifier comprises the hierarchical bus number. In response to the determination, the identifier of the destination is replaced in the request with the physical bus number and the bridge identifier. The request is sent to the bridge identified by the bridge identifier. A south chip comprises the bridge, and the south chip is connected to the north chip via a point-to-point serial link. The physical bus number identifies a bus that connects the bridge to a device. The request comprises a configuration write request that requests a write of data to the device.

Abstract: In an embodiment, a translation of a physical bus number to a hierarchical bus number is written to a south chip. The south chip receives a configuration write command that comprises a physical bus number. The south chip sends the configuration write command to a device via the bus identified by the physical bus number, and the device stores the physical bus number in the device. In response to a received message from a device that comprises the physical bus number, the south chip replaces the physical bus number in the message with the hierarchical bus number. The south chip sends the message to a north chip via a point-to-point serial link. Both the physical bus number and the hierarchical bus number identify a bus with which the device connects to a bridge in the south chip.

Abstract: One embodiment provides a method of managing power in a computer system. A device of the computer system is operated at a selected power-state. The power consumption of the computer system is monitored. If the power consumption of the computer system is approaching or has exceeded a power cap selected for the computer system, then a request to reduce the power-state for the device is generated in response. The operating system is used to service the request to reduce the power-state according to the priority of the request. The reduced power state is forced out-of-band following the request to reduce the power-state if the request is not immediately serviceable by the operating system. Different approaches can be taken to force the reduced power state, using, for example, system management mode or a platform environment control interface.

Abstract: A flash memory is provided that includes a primary flash bank and a secondary flash bank. The primary flash bank includes CRTM logic and BIOS logic and the secondary flash bank comprises a backup copy of the CRTM logic and the BIOS logic. A switching mechanism is configured to selectively activate the primary flash bank or the secondary flash bank.

Abstract: Methods, apparatus, and products for managing virtual addresses of blade servers in a data center are disclosed that include storing by a blade server management module (‘BSMM’), in non-volatile memory of a blade server, a parameter block, the parameter block including one or more virtual addresses for communications adapters of the blade server and one or more action identifiers, each action identifier representing a type of address modification; detecting, by a basic input-output system (‘BIOS’) module of the blade server upon powering on the blade server, the parameter block; and modifying, by the BIOS module of the blade server in dependence upon the one or more action identifiers of the parameter block, an address of at least one communications adapter of the blade server.