Abstract: The system resources in a computer system having a multi-level, hierarchical bus structure are allocated by determining the address resource requirement of the devices and lower level PCI-PCI bridges, if any, subordinate to every higher level bridge by receiving address resource requirement information from each device and each lower level bridge, if any. Then, the address value of resource address requirement of the devices and lower level bridges requiring specific address allocation are sorted in an ascending order. Next, the size of resource address requirement of the devices and lower level bridges with non-specified address allocation is sorted in an descending order. Finally, the sorted list is grouped by an first fit algorithm to determine the resource allocation for each device within the bus hierarchy.

Abstract: Provides management tools for a System Owner to assure that a personal computer system is secured against access by an unauthorized user by foreclosing the possibility of circumventing system's security protection during an I/O ROM scan. The POST code is designed to prompt for the proper security password prior to allowing any adapter ROM utility to be run. An interrupt service routine will detect key strokes during adapter ROM scan and prior to passing control to the adapter ROM for handling of the keyboard interrupt. Prior to the ROM Scan for the system, the POST code detects whether or not C2 Security is enabled. On some systems, the C2 functionally may not be used and, the system does not consider password protection for the adapter Utilities. If however, the C2 functionality of the system is enabled, the POST code will continue to enable the password protection for the ROM Scan. Once the interrupt service routine is established the ROM scan will begin.