Patents by Inventor Scott P. Faasse

Scott P. Faasse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927999
    Abstract: A process includes an application layer of a host of a computer platform using a smart network interface card (NIC) of the computer platform to provide an input/output (I/O) service for the application layer. The I/O service includes a service that is associated with a cloud operator domain; the smart NIC is installed in a connector; and the application layers associated with a cloud tenant domain. The process includes a baseboard management controller of the smart NIC managing the computer platform. Managing the computer platform includes the baseboard management controller managing the host; the baseboard management controller managing components of the smart NIC other than the baseboard management controller; and managing the host includes the baseboard management controller communicating with the host via the connector to control a system power state of the computer platform.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: March 12, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Scott P. Faasse, David F. Heinrich
  • Patent number: 11757612
    Abstract: A process includes a port of a bridge providing a reference clock signal to a first end of an interconnect extending between the first port and a network interface controller. The reference clock signal propagates over the interconnect to provide, at a second end of the interconnect, a delayed reference clock signal at the network interface controller. Pursuant to the process, the bridge senses a timing of the delayed reference clock signal. The process includes communicating management traffic between a network interface of a baseboard management controller and the network interface controller via the interconnect. The communication of the management traffic includes the port, responsive to the sensing of the timing of the delayed reference clock signal, synchronizing communication of data with the first end of the interconnect to the delayed reference clock signal.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: September 12, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: David F. Heinrich, Gennadiy Rozenberg, Scott P. Faasse, Melvin K. Benedict
  • Publication number: 20230134197
    Abstract: A process includes a port of a bridge providing a reference clock signal to a first end of an interconnect extending between the first port and a network interface controller. The reference clock signal propagates over the interconnect to provide, at a second end of the interconnect, a delayed reference clock signal at the network interface controller. Pursuant to the process, the bridge senses a timing of the delayed reference clock signal. The process includes communicating management traffic between a network interface of a baseboard management controller and the network interface controller via the interconnect. The communication of the management traffic includes the port, responsive to the sensing of the timing of the delayed reference clock signal, synchronizing communication of data with the first end of the interconnect to the delayed reference clock signal.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventors: David F. Heinrich, Gennadiy Rozenberg, Scott P. Faasse, Melvin K. Benedict
  • Publication number: 20230132853
    Abstract: A supervisory service of a node that includes a smart input/output (I/O) peripheral is extended into a cloud operator domain that is associated with the smart I/O peripheral. The supervisory service determines a state of a ready state indicator that is provided by the smart I/O peripheral. Based on the state, the supervisory service performs at least one of regulating an availability of an instance of an application operating environment of the node or determining whether the smart I/O peripheral is ready to be configured by the supervisory service.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventors: Dwight D. Riley, Scott P. Faasse
  • Publication number: 20230119437
    Abstract: A process includes an application layer of a host of a computer platform using a smart network interface card (NIC) of the computer platform to provide an input/output (I/O) service for the application layer. The I/O service includes a service that is associated with a cloud operator domain; the smart NIC is installed in a connector; and the application layers associated with a cloud tenant domain. The process includes a baseboard management controller of the smart NIC managing the computer platform. Managing the computer platform includes the baseboard management controller managing the host; the baseboard management controller managing components of the smart NIC other than the baseboard management controller; and managing the host includes the baseboard management controller communicating with the host via the connector to control a system power state of the computer platform.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 20, 2023
    Inventors: Scott P. Faasse, David F. Heinrich
  • Patent number: 11625338
    Abstract: A supervisory service of a node that includes a smart input/output (I/O) peripheral is extended into a cloud operator domain that is associated with the smart I/O peripheral. The supervisory service determines a state of a ready state indicator that is provided by the smart I/O peripheral. Based on the state, the supervisory service performs at least one of regulating an availability of an instance of an application operating environment of the node or determining whether the smart I/O peripheral is ready to be configured by the supervisory service.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: April 11, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dwight D. Riley, Scott P. Faasse
  • Patent number: 10740270
    Abstract: Example implementations relate to a self-tune controller. For example, the self-tune controller may poll, via an out-of-band data stream, low-level operation information about a processor or a bus of a computing system under a present workload. At least some of the low-level operation information may be descriptive of a nature of traffic on the bus. The self-tune controller may program, via an out-of-band control signal, a setting of the computing system for the present workload based on the low-level operation information.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: August 11, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kevin G. Depew, Vincent Nguyen, Scott P. Faasse, Robert E. Van Cleve
  • Patent number: 10691517
    Abstract: In one example in accordance with the present disclosure, a method for determining operating frequencies includes receiving a warranty period for a computer component. The method includes determining an operating frequency that will cause a predicted life cycle of the computer component operating at the operating frequency to fall within the warranty period. The method includes setting the computer component to operate at the operating frequency.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: June 23, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Vincent Nguyen, Robert E Van Cleve, Kevin G Depew, Scott P Faasse
  • Patent number: 10546649
    Abstract: In one example in accordance with the present disclosure, a method includes mapping, using post-package repair, an address associated with a first memory row of a computing device to a spare memory row of the computing device, wherein the spare memory row has a memory failure pattern, and reading data from the spare memory row.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: January 28, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Eric L Pope, Scott P Faasse
  • Publication number: 20180247699
    Abstract: In one example in accordance with the present disclosure, a method includes mapping, using post-package repair, an address associated with a first memory row of a computing device to a spare memory row of the computing device, wherein the spare memory row has a memory failure pattern, and reading data from the spare memory row.
    Type: Application
    Filed: August 18, 2015
    Publication date: August 30, 2018
    Inventors: Eric L POPE, Scott P FAASSE
  • Publication number: 20180203750
    Abstract: In one example in accordance with the present disclosure, a method for determining operating frequencies includes receiving a warranty period for a computer component. The method includes determining an operating frequency that will cause a predicted life cycle of the computer component operating at the operating frequency to fall within the warranty period. The method includes setting the computer component to operate at the operating frequency.
    Type: Application
    Filed: July 17, 2015
    Publication date: July 19, 2018
    Inventors: Vincent NGUYEN, Robert E VAN CLEVE, Kevin G DEPEW, Scott P FAASSE
  • Publication number: 20180165238
    Abstract: Example implementations relate to a self-tune controller. For example, the self-tune controller may poll, via an out-of-band data stream, low-level operation information about a processor or a bus of a computing system under a present workload. At least some of the low-level operation information may be descriptive of a nature of traffic on the bus. The self-tune controller may program, via an out-of-band control signal, a setting of the computing system for the present workload based on the low-level operation information.
    Type: Application
    Filed: June 26, 2015
    Publication date: June 14, 2018
    Inventors: Kevin G. Depew, Vincent Nguyen, Scott P. Faasse, Robert E. Van Cleve
  • Patent number: 9506815
    Abstract: In a system, temperature measurements are logged. From the logged measurements, duration of operation of the system in each of a plurality of temperature bands is determined.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: November 29, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: David A Moore, Scott P. Faasse, Jeffrey A. Plank, Tahir Cader
  • Patent number: 8966296
    Abstract: A processing circuit independent of a processor determines a current utilization of the processor, based on events of an execution pipeline of the processor. According to the determined utilization, the processing circuit causes the processor to transition from a first of the plurality of performance states to a second of the plurality of performance states.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: February 24, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Scott P. Faasse
  • Publication number: 20140105244
    Abstract: In a system, temperature measurements are logged. From the logged measurements, duration of operation of the system in each of a plurality of temperature bands is determined.
    Type: Application
    Filed: June 27, 2011
    Publication date: April 17, 2014
    Inventors: David A Moore, Scott P. Faasse, Jeffrey A. Plank, Tahir Cader
  • Publication number: 20140025937
    Abstract: A processing circuit independent of a processor determines a current utilization of the processor, based on events of an execution pipeline of the processor. According to the determined utilization, the processing circuit causes the processor to transition from a first of the plurality of performance states to a second of the plurality of performance states.
    Type: Application
    Filed: July 17, 2012
    Publication date: January 23, 2014
    Inventor: Scott P. Faasse
  • Patent number: 8479034
    Abstract: A method and apparatus for controlling the power usage of a processor is disclosed. The power usage of the processor is monitored. When the power usage of the processor exceeds a threshold power usage value, the power used by the processor is reduced or limited. A processor utilization value is also monitored. When the processor utilization value is above a threshold utilization value, the processor is ramped to a higher performance state. When power to the processor is being limited, a first rate is used to ramp the processor to the higher performance state. When power to the processor is not being limited, then a second rate, different from the first rate, is used to ramp the processor to the higher performance state.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: July 2, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott P. Faasse, Alan L. Goodrum
  • Publication number: 20120036385
    Abstract: A method and apparatus for controlling the power usage of a processor is disclosed. The power usage of the processor is monitored. When the power usage of the processor exceeds a threshold power usage value, the power used by the processor is reduced or limited. A processor utilization value is also monitored. When the processor utilization value is above a threshold utilization value, the processor is ramped to a higher performance state. When power to the processor is being limited, a first rate is used to ramp the processor to the higher performance state. When power to the processor is not being limited, then a second rate, different from the first rate, is used to ramp the processor to the higher performance state.
    Type: Application
    Filed: August 9, 2010
    Publication date: February 9, 2012
    Inventors: Scott P. Faasse, Alan L. Goodrum
  • Patent number: 7996829
    Abstract: A method and system manages revisions of software code for one or more servers in an infrastructure. An indication of the version of the code currently residing with one of the servers is transmitted to the infrastructure. An indication of the version of the code currently residing with the infrastructure for the server's type is also transmitted to the one of the servers. A determination is made as to whether the server's version should be updated to the infrastructure's, whether the infrastructure's version should be updated to the server's, or neither based on the transmitted indications in view of a set of preconfigured update rules. If the infrastructure's version should be updated to the server's, the image of the code currently residing with the infrastructure is replaced with an image of the code currently residing with the server.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: August 9, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin G. Depew, Scott P. Faasse
  • Publication number: 20100235834
    Abstract: A system includes hardware, a software layer, a platform layer, and a management communication channel between the software layer and the platform layer. The management communication channel provides an interface to enable the software layer to issue a hardware management command to the platform layer, where the hardware management command is to specify a change of a setting of the hardware, and where the management communication channel allows a hardware management engine of the platform layer to collaborate with the software layer to perform the change of the setting of the hardware.
    Type: Application
    Filed: March 16, 2009
    Publication date: September 16, 2010
    Inventors: Scott P. Faasse, Nicholas S. Judge, Stephen R. Berard, Tristan A. Brown