Abstract: A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The phase locked loop that is responsive to the modulated signal includes a controlled oscillator output and a feedback loop between the controlled oscillator input and the controlled oscillator output. The feedback loop includes a mixer that is responsive to a local oscillator. The modulator may be placed in the phase locked loop.

Abstract: A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The in-phase and quadrature-phase signals may be normalized in-phase and quadrature-phase signals. Alternatively, a phase tracking subsystem may be provided that is responsive to the quadrature modulator to produce a phase signal that is responsive to phase changes in the modulated signal and that is independent of amplitude changes in the modulated signal.

Abstract: Embodiments of methods, transmitters, and computer program products are provided for transmitting a signal by adjusting a delay between an amplitude component of the signal and a phase component of the signal based on the transmission power. Error vector magnitude and adjacent channel power ratio are two common criteria used in evaluating transmitter performance. By adjusting the delay between the amplitude component of the transmitted signal and the phase component of the transmitted signal, the error vector magnitude and/or the adjacent channel power ratio may be reduced. The particular delay value that provides the best error vector magnitude performance and/or adjacent channel power ratio performance may differ based on the transmission power level. Therefore, the delay value is adjusted based on the transmission power.

Abstract: Embodiments of methods, transmitters, and computer program products are provided for transmitting a signal by adjusting a delay between an amplitude component of the signal and a phase component of the signal based on the transmission power. Error vector magnitude and adjacent channel power ratio are two common criteria used in evaluating transmitter performance. By adjusting the delay between the amplitude component of the transmitted signal and the phase component of the transmitted signal, the error vector magnitude and/or the adjacent channel power ratio may be reduced. The particular delay value that provides the best error vector magnitude performance and/or adjacent channel power ratio performance may differ based on the transmission power level. Therefore, the delay value is adjusted based on the transmission power.

Abstract: Voltage controlled oscillator circuits are provided including a voltage controlled oscillator (VCO) having an input and an output responsive to the input. A tuning circuit coupled to the VCO sets a relationship between the input and the output of the VCO. An aided acquisition circuit is coupled to the input of the VCO. A control circuit selects a state of the tuning circuit to set the relationship between the input and the output of the VCO. The control circuit also controls operation of the aided acquisition circuit responsive to changes in the state of the tuning circuit. Methods for operating voltage controlled oscillator circuits are also provided. In addition, phase lock loop circuits and mobile terminals including the voltage controlled oscillator circuits are provided.

Abstract: A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The phase locked loop that is responsive to the modulated signal includes a controlled oscillator output and a feedback loop between the controlled oscillator input and the controlled oscillator output. The feedback loop includes a mixer that is responsive to a local oscillator. The modulator may be placed in the phase locked loop.

Abstract: An input buffer circuit is operable to selectively present either low or high input impedance while maintaining uniform output impedance. The buffer is characterized by first and second amplifier circuits connected in parallel between an input to and an output from the buffer. The amplifiers are individually controlled between enabled and disabled states. When enabled, the first amplifier has low input impedance and predetermined output impedance and the second amplifier has high input impedance and the predetermined output impedance, and when disabled each amplifier has high input and output impedance. To operate the buffer to have low input impedance, the first amplifier is enabled while the second amplifier is disabled. To operate the buffer to have high input impedance, the second amplifier is enabled while the first amplifier is disabled.

Abstract: A wide range single stage variable gain amplifier is provided for receiving an input signal and outputting an amplitude varied version of the received input signal. In its most basic form, the wide range single stage variable gain amplifier includes an input circuit receiving an input signal and developing an input current, a first control circuit receiving the input current, the first control circuit being selectively controllable to output an attenuated version of the received input current, a second control circuit directly connected to the first control circuit for receiving the attenuated input current therefrom, the second control circuit being selectively controllable to output a further attenuated version of the attenuated input current, and an output circuit receiving the further attenuated input current and developing an amplitude varied version of the received input signal.