Patents by Inventor Scott R. Sahaida

Scott R. Sahaida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7741155
    Abstract: Some embodiments of the present invention relate to a semiconducting device and method that include a substrate and a first die that is attached to the substrate. The first die includes active circuitry (e.g., a flash memory array or logic circuitry) on an upper surface of the first die. The semiconducting device further includes a spacer that covers the active circuitry on the upper surface of the first die and a second die that is stacked onto the spacer and the first die. The spacer extends from a first side of the first die to an opposing second side of the first die. The spacer also extends near a third side of the first die and an opposing fourth side of the first die such that the active circuitry is exposed near the third and fourth sides of the first die.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: June 22, 2010
    Assignee: Intel Corporation
    Inventors: Scott R. Sahaida, Iwen Chao
  • Publication number: 20080280395
    Abstract: Some embodiments of the present invention relate to a semiconducting device and method that include a substrate and a first die that is attached to the substrate. The first die includes active circuitry (e.g., a flash memory array or logic circuitry) on an upper surface of the first die. The semiconducting device further includes a spacer that covers the active circuitry on the upper surface of the first die and a second die that is stacked onto the spacer and the first die. The spacer extends from a first side of the first die to an opposing second side of the first die. The spacer also extends near a third side of the first die and an opposing fourth side of the first die such that the active circuitry is exposed near the third and fourth sides of the first die.
    Type: Application
    Filed: April 22, 2008
    Publication date: November 13, 2008
    Inventors: Scott R. Sahaida, Iwen Chao
  • Patent number: 7378725
    Abstract: Some embodiments of the present invention relate to a semiconducting device and method that include a substrate and a first die that is attached to the substrate. The first die includes active circuitry (e.g., a flash memory array or logic circuitry) on an upper surface of the first die. The semiconducting device further includes a spacer that covers the active circuitry on the upper surface of the first die and a second die that is stacked onto the spacer and the first die. The spacer extends from a first side of the first die to an opposing second side of the first die. The spacer also extends near a third side of the first die and an opposing fourth side of the first die such that the active circuitry is exposed near the third and fourth sides of the first die.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 27, 2008
    Assignee: Intel Corporation
    Inventors: Scott R. Sahaida, Iwen Chao
  • Patent number: 5672240
    Abstract: A diamond-based structure includes a substrate, an adhesive material on a face of the substrate, and an array of spaced apart diamond mesas bonded to the substrate by the adhesive material. In particular, each of the diamond mesas can have a growth surface adjacent the substrate and an interfacial surface opposite the substrate, and the interfacial surface can be smooth relative to the growth surface. This structure can be fabricated by providing a sacrificial substrate, forming a plurality of diamond mesas on a face of the sacrificial substrate, bonding the diamond mesas to a transfer substrate, and removing the sacrificial substrate. Accordingly, the interfacial surfaces of the diamond, which are formed adjacent the sacrificial substrate and then exposed by removing the substrate are smooth.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: September 30, 1997
    Assignee: Kobe Steel USA Inc.
    Inventors: Brian R. Stoner, Joseph S. Holmes, Jr., David L. Dreifus, Scott R. Sahaida, Roy E. Fauber, Michelle L. Hartsell, Dean Malta
  • Patent number: 5652436
    Abstract: A diamond-based structure includes a substrate, an adhesive material on a face of the substrate, and an array of spaced apart diamond mesas bonded to the substrate by the adhesive material. In particular, each of the diamond mesas can have a growth surface adjacent the substrate and an interfacial surface opposite the substrate, and the interfacial surface can be smooth relative to the growth surface. This structure can be fabricated by providing a sacrificial substrate, forming a plurality of diamond mesas on a face of the sacrificial substrate, bonding the diamond mesas to a transfer substrate, and removing the sacrificial substrate. Accordingly, the interfacial surfaces of the diamond, which are formed adjacent the sacrificial substrate and then exposed by removing the substrate are smooth.
    Type: Grant
    Filed: August 14, 1995
    Date of Patent: July 29, 1997
    Assignee: Kobe Steel USA Inc.
    Inventors: Brian R. Stoner, Joseph S. Holmes, Jr., David L. Dreifus, Scott R. Sahaida, Roy E. Fauber, Michelle L. Hartsell, Dean Malta
  • Patent number: 5512873
    Abstract: The highly-oriented diamond film thermistor has a temperature sensing part formed of a highly-oriented diamond film grown by chemical vapor deposition. This highly-oriented diamond film satisfies the conditions that at least 65% of the film surface area is covered by (100) or (111) planes of diamond and the differences {.DELTA..alpha., .DELTA..beta., .DELTA..gamma.} of Euler angles {.alpha., .beta., .gamma.}, which represent the orientations of the crystal planes, simultaneously satisfy conditions, .vertline..DELTA..alpha..vertline..ltoreq.5.degree., .vertline..DELTA..beta..vertline..ltoreq.5.degree., .vertline..DELTA..gamma..vertline..ltoreq.5.degree., between adjacent crystal planes.
    Type: Grant
    Filed: June 10, 1994
    Date of Patent: April 30, 1996
    Inventors: Kimitsugu Saito, Koichi Miyata, John P. Bade, Jr., Brian R. Stoner, Jesko A. von Windheim, Scott R. Sahaida
  • Patent number: 5453628
    Abstract: A capacitive transducer includes a first electrically conductive layer, and a diamond diaphragm mounted opposite the first electrically conductive Layer so as to be moveable relative to the first electrically conductive layer. The first electrically conductive layer defines a first plate for the transducer, while the diaphragm defines the second plate for the transducer. In one embodiment of the transducer, the diamond layer is degeneratively doped providing the second plate. The microelectronic capacitive transducer preferably also includes an insulating layer on a face of the diamond layer adjacent the electrically conductive layer defining an overpressure stop for the transducer. The transducer includes absolute or differential pressure sensing embodiments. The microelectronic capacitive transducer may also be configured as an actuator. The diamond layer may be highly oriented diamond including semiconductor devices formed therein to provide signal conditioning. A fabrication method is also disclosed.
    Type: Grant
    Filed: October 12, 1994
    Date of Patent: September 26, 1995
    Assignee: Kobe Steel USA, Inc.
    Inventors: Michelle L. Hartsell, Scott R. Sahaida, Brian R. Stoner, Glenn J. Tessmer
  • Patent number: 5155559
    Abstract: A semiconductor device comprising a semiconducting diamond layer, (e.g. single crystal or polycrystalline), a refractory metal silicide layer adjacent the diamond layer for forming a rectifying contact therewith, and an annealed interface region between the diamond layer and the refractory metal silicide layer. The annealed interface region is preferably a non-abrupt interface comprising material selected from the group consisting of silicon carbide, the carbide of the refractory metal and mixtures thereof. The present invention also provides a method for making a rectifying contact on a semiconducting diamond layer comprising the steps of forming a refractory metal silicide on the diamond layer, and annealing the refractory metal silicide and diamond layer. Preferably, the step of annealing comprises the step of heating the diamond layer and refractory metal silicide at temperature of at least about 450.degree. C.
    Type: Grant
    Filed: July 25, 1991
    Date of Patent: October 13, 1992
    Assignees: North Carolina State University, Kobe Steel U.S.A. Inc.
    Inventors: Trevor P. Humphreys, Robert J. Nemanich, Kalyankumar Das, Dale G. Thompson, Jr., Scott R. Sahaida