Abstract: A semiconductor-based imaging device and method of manufacture. A direct bond hybridization (DBH) structure is formed on a top surface of a read out integrated circuit (ROIC). A silicon-based detector is bonded to the ROIC via the DBH structure. A non-silicon-based detector is bonded to the DBH structure located on the top of the ROIC using indium-based hybridization.

Abstract: A semiconductor-based imaging device and method of manufacture. A direct bond hybridization (DBH) structure is formed on a top surface of a read out integrated circuit (ROIC). A silicon-based detector is bonded to the ROIC via the DBH structure. A non-silicon-based detector is bonded to the DBH structure located on the top of the ROIC using indium-based hybridization.

Abstract: A semiconductor-based imaging device and method of manufacture. A direct bond hybridization (DBH) structure is formed on a top surface of a read out integrated circuit (ROIC). A silicon-based detector is bonded to the ROIC via the DBH structure. A non-silicon-based detector is bonded to the DBH structure located on the top of the ROIC using indium-based hybridization.

Abstract: A semiconductor-based imaging device and method of manufacture. A direct bond hybridization (DBH) structure is formed on a top surface of a read out integrated circuit (ROIC). A silicon-based detector is bonded to the ROIC via the DBH structure. A non-silicon-based detector is bonded to the DBH structure located on the top of the ROIC using indium-based hybridization.

Abstract: Disclosed is a process for manufacturing individual die devices, with a desired or predicted amount of flatness, from a bonded wafer process. The flatness of a bonded wafer is measured at point in the wafer manufacturing process. This measurement is compared to a value predetermined by an empirical analysis of previous devices made by the same process. If the flatness of the bonded wafer is not at the predetermined value, then one or more compensation layers are provided to the bonded wafer to obtain the predetermined flatness value. Once obtained, subsequent processing is performed and the resulting individual dies are obtained with the desired flatness characteristic.

Abstract: Disclosed is a process for manufacturing individual die devices, with a desired or predicted amount of flatness, from a bonded wafer process. The flatness of a bonded wafer is measured at point in the wafer manufacturing process. This measurement is compared to a value predetermined by an empirical analysis of previous devices made by the same process. If the flatness of the bonded wafer is not at the predetermined value, then one or more compensation layers are provided to the bonded wafer to obtain the predetermined flatness value. Once obtained, subsequent processing is performed and the resulting individual dies are obtained with the desired flatness characteristic.

Abstract: A method for bonding a first semiconductor body having a plurality of electromagnetic radiation detectors to a second semiconductor body having read out integrated circuits for the detectors. The method includes: aligning electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits; tacking the aligned electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits to form an intermediate stage structure; packaging the intermediate stage structure into a vacuum sealed electrostatic shielding container having flexible walls; inserting the package with the intermediate stage structure therein into an isostatic pressure chamber; and applying the isostatic pressure to the intermediate stage structure through walls of the container. The container includes a stand-off to space walls of the container from edges of the first semiconductor body.

Abstract: A method for bonding a first semiconductor body having a plurality of electromagnetic radiation detectors to a second semiconductor body having read out integrated circuits for the detectors. The method includes: aligning electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits; tacking the aligned electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits to form an intermediate stage structure; packaging the intermediate stage structure into a vacuum sealed electrostatic shielding container having flexible walls; inserting the package with the intermediate stage structure therein into an isostatic pressure chamber; and applying the isostatic pressure to the intermediate stage structure through walls of the container. The container includes a stand-off to space walls of the container from edges of the first semiconductor body.

Abstract: A contact structure for interconnecting a first substrate to an indium interconnect structure on a second substrate. The contact structure comprises a diffusive layer and a non-oxidizing layer, with a thickness of less than approximately 150 nm, positioned on the diffusive layer for alignment with the indium interconnect.

Abstract: In semiconductor treatment apparatus with a plasma generating zone, a treatment zone, and a bent path connecting the two so as to block direct transmission of ultraviolet light from the plasma generating zone to the workpiece in the treatment zone, a light trap is provided to suppress indirect transmission of light as by reflection or by transmission within transparent walls of a conduit defining the bent path.