Patents by Inventor Scott Sterrantino

Scott Sterrantino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170024668
    Abstract: Disclosed is an automated tool that assesses an organization's issues through assessments and determines the most appropriate solution flows based on the user's answers and question rank. This invention allows an organization to assess their issues and complete the solution flows in a fully automated environment, providing a less expensive, automated, self-paced flow to improve the organization versus the traditional in person consultation. Any discipline may be incorporated into the tool, allowing new information to be added any time and tailored to specific discipline needs.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 26, 2017
    Inventors: Charlene G. Aldridge, Scott Sterrantino
  • Patent number: 7269670
    Abstract: An analog Ethernet detector determines if an IEEE 1394b long haul application using Category 5 (CAT 5 UTP) cable, is connected to an Ethernet which share certain pins of the RJ45 connector used to connect devices to the CAT 5 cable. The detector does not require a processor core or clocking and can be built as a completely analog device.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: September 11, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Scott Sterrantino, Win N. Maung
  • Publication number: 20040250174
    Abstract: An analog Ethernet detector determines if an IEEE 1394b long haul application using Category 5 (CAT 5 UTP) cable, is connected to an Ethernet which share certain pins of the RJ45 connector used to connect devices to the CAT 5 cable. The detector does not require a processor core or clocking and can be built as a completely analog device.
    Type: Application
    Filed: June 5, 2003
    Publication date: December 9, 2004
    Inventors: Scott Sterrantino, Win N. Maung
  • Patent number: 6611155
    Abstract: A dual mode output driver circuit within the architecture of a IEEE 1394-1995 IEEE 1394b compliant physical layer (PHY) circuit address the deficiencies of driver incompatibility between the first standard, IEEE 1394-1995, and the latest standard, IEEE 1394b. This output driver circuit of a serial bus structure which directly couples to a cable in a system for digital data transfer to and from the cable over the bus structure includes a current source, a first sub-circuit portion, a second sub-circuit portion, a switch and an amplifier. The first sub-circuit portion includes a reference voltage node. The current source connects to both the first and second sub-circuit portions to provide current. The second sub-circuit portion includes an external voltage bias node and a common mode voltage node, where the external voltage bias node connects to the cable.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: August 26, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Scott Sterrantino
  • Patent number: 6515524
    Abstract: A power-up control circuit architecture that utilizes zero current under normal operation. The power-up control circuit will sense a common supply voltage, Vcc, and turn an output on and off at a desired threshold voltage, providing a substantially faster on/off switch than that achievable solely by sensing the common supply voltage.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: February 4, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Scott Sterrantino, Jian Zhou
  • Publication number: 20030011411
    Abstract: A power-up control circuit architecture that utilizes zero current under normal operation. The power-up control circuit will sense a common supply voltage, Vcc, and turn an output on and off at a desired threshold voltage, providing a substantially faster on/off switch than that achievable solely by sensing the common supply voltage.
    Type: Application
    Filed: July 11, 2001
    Publication date: January 16, 2003
    Inventors: Scott Sterrantino, Jian Zhou
  • Publication number: 20020186047
    Abstract: A dual mode output driver circuit within the architecture of a IEEE 1394-1995 IEEE 1394b compliant physical layer (PHY) circuit address the deficiencies of driver incompatibility between the first standard, IEEE 1394-1995, and the latest standard, IEEE 1394b. This output driver circuit of a serial bus structure which directly couples to a cable in a system for digital data transfer to and from the cable over the bus structure includes a current source, a first sub-circuit portion, a second sub-circuit portion, a switch and an amplifier. The first sub-circuit portion includes a reference voltage node. The current source connects to both the first and second sub-circuit portions to provide current. The second sub-circuit portion includes an external voltage bias node and a common mode voltage node, where the external voltage bias node connects to the cable.
    Type: Application
    Filed: November 2, 2001
    Publication date: December 12, 2002
    Inventor: Scott Sterrantino