Patents by Inventor Scott T. Allen

Scott T. Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9142636
    Abstract: A III-Nitride field-effect transistor, specifically a HEMT, comprises a channel layer, a barrier layer on the channel layer, an etch stop layer on the cap layer, a dielectric layer on the etch stop layer, a gate recess that extends to the barrier layer, and a gate contact in the gate recess. The etch stop layer may reduce damage associated with forming the recessed gate by not exposing the barrier layer to dry etching. The etch stop layer in the recess is removed and the remaining etch stop layer serves as a passivation layer.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: September 22, 2015
    Assignee: Cree, Inc.
    Inventors: Scott T. Sheppard, Andrew K. Mackenzie, Scott T. Allen, Richard P. Smith
  • Patent number: 8907366
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a current spreading layer, on the epitaxial region. A barrier layer is provided on the current spreading layer and extending on a sidewall of the current spreading layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 9, 2014
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Publication number: 20140048822
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a current spreading layer, on the epitaxial region. A barrier layer is provided on the current spreading layer and extending on a sidewall of the current spreading layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 20, 2014
    Applicant: Cree, Inc.
    Inventors: David B. Slater, JR., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: 8604502
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: December 10, 2013
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Publication number: 20130252386
    Abstract: A III-Nitride field-effect transistor, specifically a HEMT, comprises a channel layer, a barrier layer on the channel layer, an etch stop layer on the cap layer, a dielectric layer on the etch stop layer, a gate recess that extends to the barrier layer, and a gate contact in the gate recess. The etch stop layer may reduce damage associated with forming the recessed gate by not exposing the barrier layer to dry etching. The etch stop layer in the recess is removed and the remaining etch stop layer serves as a passivation layer.
    Type: Application
    Filed: May 13, 2013
    Publication date: September 26, 2013
    Applicant: Cree, Inc.
    Inventors: Scott T. Sheppard, Andrew K. Mackenzie, Scott T. Allen, Richard P. Smith
  • Publication number: 20120305939
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Application
    Filed: August 15, 2012
    Publication date: December 6, 2012
    Inventors: David B. Slater, JR., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: 8269241
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: September 18, 2012
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: 7970891
    Abstract: The present disclosure includes a system and method for tracking links displayed in Web browsers. In some implementations, a method includes receiving a hostname operable to identify an action and an instance of a link displayed through a Web browser. The hostname is unique for a period of time. The one or more actions associated with the displayed link are tracked.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: June 28, 2011
    Assignee: Google Inc.
    Inventors: Leonidas Kontothanssis, Scott T. Allen
  • Publication number: 20100006883
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 14, 2010
    Inventors: David B. Slater, JR., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: 7611915
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: November 3, 2009
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: 7211833
    Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: May 1, 2007
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
  • Patent number: 7067361
    Abstract: SiC MESFETs are disclosed which utilize a semi-insulating SiC substrate which substantially free of deep-level dopants. Utilization of the semi-insulating substrate may reduce back-gating effects in the MESFETs. Also provided are SiC MESFETs with a two recess gate structure. MESFETS with a selectively doped p-type buffer layer are also provided. Utilization of such a buffer layer may reduce output conductance by a factor of 3 and produce a 3 db increase in power gain over SiC MESFETs with conventional p-type buffer layers. A ground contact may also be provided to the p-type buffer layer and the p-type buffer layer may be made of two p-type layers with the layer formed on the substrate having a higher dopant concentration. SiC MESFETs according to embodiments of the present invention may also utilize chromium as a Schottky gate material. Furthermore, an oxide-nitride-oxide (ONO) passivation layer may be utilized to reduce surface effects in SiC MESFETs.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: June 27, 2006
    Assignee: Cree, Inc.
    Inventors: Scott T. Allen, John W. Palmour, Terrence S. Alcorn
  • Publication number: 20040159865
    Abstract: SiC MESFETs are disclosed which utilize a semi-insulating SiC substrate which substantially free of deep-level dopants. Utilization of the semi-insulating substrate may reduce back-gating effects in the MESFETs. Also provided are SiC MESFETs with a two recess gate structure. MESFETS with a selectively doped p-type buffer layer are also provided. Utilization of such a buffer layer may reduce output conductance by a factor of 3 and produce a 3 db increase in power gain over SiC MESFETs with conventional p-type buffer layers. A ground contact may also be provided to the p-type buffer layer and the p-type buffer layer may be made of two p-type layers with the layer formed on the substrate having a higher dopant concentration. SiC MESFETs according to embodiments of the present invention may also utilize chromium as a Schottky gate material. Furthermore, an oxide-nitride-oxide (ONO) passivation layer may be utilized to reduce surface effects in SiC MESFETs.
    Type: Application
    Filed: November 12, 2003
    Publication date: August 19, 2004
    Inventors: Scott T. Allen, John W. Palmour, Terrence S. Alcorn
  • Patent number: 6686616
    Abstract: SiC MESFETs are disclosed which utilize a semi-insulating SiC substrate which substantially free of deep-level dopants. Utilization of the semi-insulating substrate may reduce back-gating effects in the MESFETs. Also provided are SiC MESFETs with a two recess gate structure. MESFETS with a selectively doped p-type buffer layer are also provided. Utilization of such a buffer layer may reduce output conductance by a factor of 3 and produce a 3 db increase in power gain over SiC MESFETs with conventional p-type buffer layers. A ground contact may also be provided to the p-type buffer layer and the p-type buffer layer may be made of two p-type layers with the layer formed on the substrate having a higher dopant concentration. SiC MESFETs according to embodiments of the present invention may also utilize chromium as a Schottky gate material. Furthermore, an oxide-nitride-oxide (ONO) passivation layer may be utilized to reduce surface effects in SiC MESFETs.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: February 3, 2004
    Assignee: Cree, Inc.
    Inventors: Scott T. Allen, John W. Palmour, Terrence S. Alcorn
  • Patent number: 5945879
    Abstract: A microwave power amplifier is comprised of a plurality of series connected amplifier stages. Each stage is provided with a local negative feedback. The addition of the local voltage feedback distribution networks provide correct voltage distribution and equal current distribution for all transistors, such that the peak-to-peak voltage and current swings of each transistor can be set simultaneously to the values required for efficient amplifier operation. The method applies to both FETs and bipolar transistors. The series connected microwave power amplifier is thus characterized as a stack with local voltage feedback networks which provide an equal distribution of voltage across the transistors in the stack. The amplifier stages can be biased and tuned to collectively operate either as a class A or B amplifier.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: August 31, 1999
    Assignee: The Regents of the University of California
    Inventors: Mark Rodwell, Shrinivasan Jaganathan, Scott T. Allen
  • Patent number: 5686737
    Abstract: A metal-semiconductor field-effect-transistor (MESFET) is disclosed that exhibits reduced source resistance and higher operating frequencies. The MESFET comprises an epitaxial layer of silicon carbide, and a gate trench in the epitaxial layer that exposes a silicon carbide gate surface between two respective trench edges. A gate contact is made to the gate surface, and with the trench further defines the source and drain regions of the transistor. Respective ohmic metal layers form ohmic contacts on the source and drain regions of the epitaxial layer, and the edges of the metal layers at the trench are specifically aligned with the edges of the epitaxial layer at the trench.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: November 11, 1997
    Assignee: Cree Research, Inc.
    Inventor: Scott T. Allen