Patents by Inventor Scott T. McFarland

Scott T. McFarland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040172508
    Abstract: A memory subsystem implements a mirrored mode and includes a plurality of memory modules coupled to a memory controller. Each module is capable of storing both primary and mirrored data.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 2, 2004
    Inventors: Vincent Nguyen, Scott T. McFarland
  • Patent number: 6205507
    Abstract: In a method and system for use in connection with performing a processor-to-bus cycle in a multi-processor computer system, the processor-to-bus cycle is interrupted before completion and an operation to save data in memory is performed. Thereafter, the interrupted processor-to-bus cycle is resumed.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: March 20, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Bassam N. Elkhoury, Scott T. McFarland, Miguel A. Perez
  • Patent number: 6141735
    Abstract: In a method and system for performing a memory access cycle from a first processor to a memory address in a multi-processor system, the memory access cycle is initiated, and, prior to completion of the memory access cycle, a snoop routine is initiated with respect to the memory address. The memory access cycle is continued without awaiting responses from another one of the processors if a second one of the processors provides a signal which indicates that immediate completion of the memory access cycle will not disturb the integrity of data stored in the system.
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: October 31, 2000
    Inventors: Bassam N. Elkhoury, Scott T. McFarland, Miguel A. Perez
  • Patent number: 5752265
    Abstract: In a method and system for performing a memory access cycle from a first processor to a memory address in a multi-processor system, the memory access cycle is initiated, and, prior to completion of the memory access cycle, a snoop routine is initiated with respect to the memory address. The memory access cycle is continued without awaiting responses from another one of the processors if a second one of the processors provides a signal which indicates that immediate completion of the memory access cycle will not disturb the integrity of data stored in the system.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: May 12, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Bassam N. Elkhoury, Scott T. McFarland, Miguel A. Perez