Abstract: A pouch-type battery case includes a cup portion, which accommodates therein an electrode assembly formed by stacking an electrode and a separator, and a plurality of die edges connecting an outer wall of the cup portion to a side extending from the outer wall. The die edges include a first region, which is rounded at a first radius (r1) of curvature and at which an electrode tab extending from the electrode is positioned, and a second region which is other than the first region and rounded at one or more second radii (r2, r3, r4) of curvature less than or equal to the first radius (r1) of curvature. The second region is divided into an inner region and an outer region with respect to the first region, and the radius (r2) of curvature in the inner region differs from the radii (r3, r4) of curvature in the outer region.

Abstract: A nonvolatile memory device according to the embodiment includes: a first inverter; and a second inverter cross-coupled to the first inverter, wherein the second inverter includes a pull-up transistor, a pull-down transistor, and a ferroelectric field effect transistor having gate nodes connected to each other, and a restore transistor having one electrode connected to the ferroelectric field effect transistor, and the second inverter stores data in a nonvolatile manner.

Abstract: A PUF apparatus comprises: a PUF cell array in which a plurality of PUF cells are arranged each including a FeFET pair whose gates are commonly connected to a corresponding word line among a plurality of word lines, and whose drains and sources are connected to a corresponding bit line pair and a corresponding source line pair among a plurality of bit line pairs and a plurality of source line pairs running in a direction crossing the plurality of word lines; and a read-write-back block which is activated according to a read enable signal, and senses and amplifies a voltage difference occurring in a corresponding bit line pair among the plurality of bit line pairs according to the difference in driving strength due to a deviation in a manufacturing process of the FeFET pair in the PUF cell selected by a selected word line among the plurality of word lines.

Abstract: The present invention relates to a method for culturing a 3-dimensional lung cancer organoid and a method for preparing a patient-derived xenograft animal model using the same. More specifically, the present invention relates to a method for culturing a 3-dimensional lung cancer organoid, a lung cancer organoid prepared by the method, a medium composition for culturing the lung cancer organoid, a method for preparing a xenograft animal model using the lung cancer organoid, a patient-derived lung cancer organoid xenograft animal model prepared by the method, and a method for analyzing therapeutic efficacy of an anticancer agent and a method for screening an anticancer agent, using the animal model.

Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.

Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.

Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.

Abstract: A chip-scale package type light emitting diode is provided. In the light emitting diode according to one embodiment, an opening exposing a pad metal layer is separated from an opening of a lower insulation layer which exposes an ohmic reflection layer formed on a mesa. Therefore, it is possible to prevent solder, particularly Sn, from diffusing and contaminating the ohmic reflection layer.

Abstract: A light emitting diode having a plurality of light emitting cells is provided. A light emitting diode according to an embodiment includes a reflection metal layer covering a region between light emitting cells, in which the reflection metal layer is disposed between connectors electrically connecting adjacent light emitting cells, and electrically insulated from a bump pad.

Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.

Abstract: A chip-scale package type light emitting diode is provided. In the light emitting diode according to one embodiment, an opening exposing a pad metal layer is separated from an opening of a lower insulation layer which exposes an ohmic reflection layer formed on a mesa. Therefore, it is possible to prevent solder, particularly Sn, from diffusing and contaminating the ohmic reflection layer.

Abstract: A light emitting diode is provided to include a substrate; a light emitting structure disposed on the substrate, and including first and second semiconductor layers; a transparent electrode in ohmic contact with the second semiconductor layer; a contact electrode disposed on the first semiconductor layer; a current spreader disposed on the transparent electrode; a first insulation reflection layer covering the substrate, the light emitting structure, the transparent electrode, the contact electrode, and the current spreader, having openings exposing portions of the contact electrode and the current spreader, and including a distributed Bragg reflector; first and second pad electrodes disposed on the first insulation reflection layer and connected to the contact electrode and the current spreader through the openings; and a second insulation reflection layer disposed under the substrate and including a distributed Bragg reflector.

Abstract: A light emitting diode chip having improved light extraction efficiency is provided. The light emitting diode chip includes a substrate, a first conductivity type semiconductor layer, a mesa, a side coating layer, and a reflection structure. The first conductivity type semiconductor layer is disposed on the substrate. The mesa includes an active layer and a second conductivity type semiconductor layer. The mesa is disposed on a partial region of the first conductivity type semiconductor layer to expose an upper surface of the first conductivity type semiconductor layer along an edge of the first conductivity type semiconductor layer. The side coating layer(s) covers a side surface of the mesa. The reflection structure is spaced apart from the side coating layer(s) and disposed on the exposed first conductivity type semiconductor layer.

Abstract: A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.

Abstract: A light emitting diode chip having improved light extraction efficiency is provided. The light emitting diode chip includes a substrate, a first conductivity type semiconductor layer, a mesa, a side coating layer, and a reflection structure. The first conductivity type semiconductor layer is disposed on the substrate. The mesa includes an active layer and a second conductivity type semiconductor layer. The mesa is disposed on a partial region of the first conductivity type semiconductor layer to expose an upper surface of the first conductivity type semiconductor layer along an edge of the first conductivity type semiconductor layer. The side coating layer(s) covers a side surface of the mesa. The reflection structure is spaced apart from the side coating layer(s) and disposed on the exposed first conductivity type semiconductor layer.

Abstract: A light-emitting element includes a light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first contact electrode and a second contact electrode located on the light-emitting structure, and respectively making ohmic contact with the first conductive semiconductor layer and the second conductive semiconductor layer; an insulation layer for covering a part of the first contact electrode and the second contact electrode so as to insulate the first contact electrode and the second contact electrode; a first electrode pad and a second electrode pad electrically connected to each of the first contact electrode and the second contact electrode; and a radiation pad formed on the insulation layer, and radiating heat generated from the light-emitting structure.

Abstract: A light emitting diode having a plurality of light emitting cells is provided. The light emitting diode according to an exemplary embodiment includes a lower insulation layer covering an ohmic reflection layer, connectors disposed on the lower insulation layer to connect the light emitting cells, and an upper insulation layer covering the connectors and the lower insulation layer. An edge of the lower insulation layer is spaced apart farther from an edge of the upper insulation layer than an edge of the light emitting cell. The lower insulation layer susceptible to moisture may be protected and reliability of the light emitting diode may improve.

Abstract: A light-emitting element includes a light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first contact electrode and a second contact electrode located on the light-emitting structure, and respectively making ohmic contact with the first conductive semiconductor layer and the second conductive semiconductor layer; an insulation layer for covering a part of the first contact electrode and the second contact electrode so as to insulate the first contact electrode and the second contact electrode; a first electrode pad and a second electrode pad electrically connected to each of the first contact electrode and the second contact electrode; and a radiation pad formed on the insulation layer, and radiating heat generated from the light-emitting structure.

Abstract: A display apparatus includes a display panel, a panel guide supporting a lower edge of the display panel, and a backlight unit supplying light to the display panel. The backlight unit includes at least one first substrate, a plurality of light emitting elements, and a plurality of light guide structures disposed on the at least first one substrate and arranged relative to one or more of the plurality of light emitting elements.