Patents by Inventor Se-hoon Oh

Se-hoon Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9059330
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: June 16, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Publication number: 20150091133
    Abstract: In a semiconductor device and in methods of formation thereof, a semiconductor device comprises a substrate, a lower electrode on the substrate, and a dielectric layer on the lower electrode. An adhesion layer is positioned on the dielectric layer and an upper electrode is positioned on the adhesion layer. The adhesion layer contacts the dielectric layer and the upper electrode, and comprises a conductive material.
    Type: Application
    Filed: June 26, 2014
    Publication date: April 2, 2015
    Inventors: Kyu-Ho Cho, Hyun-Jeong Yang, Se-Hoon Oh, Yong-Jae Lee, Ki-Vin IM, Jae-Soon Lim, Han-Jin Lim, Jae-Wan Chang, Chang-Hwa Jung
  • Publication number: 20130284209
    Abstract: The substrate cleaning apparatus includes a first process chamber in which a liquid treating process is performed on a substrate by supplying a treating solution, a second process chamber in which a drying process is performed on the substrate, and a carrying unit carrying the substrate between the first process chamber and the second process chamber. The first process chamber includes a liquid treating housing providing a space in which the liquid treating process is performed on the substrate, a spin chuck supporting the substrate within the liquid treating housing, and a liquid supply member supplying the treating solution onto the substrate supported by the spin chuck. The second process chamber includes a drying housing providing a space in which the substrate is dried, a substrate support member supporting the substrate within the drying housing, and a heater heating the substrate.
    Type: Application
    Filed: April 30, 2013
    Publication date: October 31, 2013
    Applicant: SEMES CO., LTD.
    Inventors: YU HWAN KIM, BYUNG MAN KANG, SE HOON OH, YEON JOON KIM
  • Patent number: 8357593
    Abstract: Provided are methods of removing water adsorbed or bonded to a surface of a semiconductor substrate, and methods of depositing an atomic layer using the method of removing water described herein. The method of removing water includes applying a chemical solvent to the surface of a semiconductor substrate, and removing the chemical solvent from the surface of the semiconductor substrate.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: January 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-chul Kim, Youn-soo Kim, Ki-vin Im, Cha-young Yoo, Jong-cheol Lee, Ki-yeon Park, Hoon-sang Choi, Se-hoon Oh
  • Patent number: 8344439
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Patent number: 8339765
    Abstract: A capacitor includes a substrate, a plurality of first storage electrodes, a plurality of second storage electrodes, a first supporting layer pattern, a dielectric layer and a plate electrode. A plurality of contact pads is formed I the substrate. The first storage electrodes are arranged along lines parallel with a first direction and electrically connected to the contact pads, respectively. The second storage electrodes are respectively stacked on the first storage electrodes. The first supporting layer pattern extends in a direction parallel with the first direction between adjacent second storage electrodes and makes contact with the adjacent second storage electrodes to support the second storage electrodes. The dielectric layer is formed on the first and second storage electrodes. The plate electrode is formed on the dielectric layer.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: December 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hoon-Sang Choi, Ki-Vin Im, Se-Hoon Oh, Sang-Yeol Kang, Cha-Young Yoo
  • Patent number: 8258064
    Abstract: Methods of forming a metal silicate layer and methods of fabricating a semiconductor device including the metal silicate layer are provided, the methods of forming the metal silicate layer include forming the metal silicate using a plurality of silicon precursors. The silicon precursors are homoleptic silicon precursors in which ligands bound to silicon have the same molecular structure.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: September 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-cheol Lee, Ki-yeon Park, Se-hoon Oh, Youn-soo Kim
  • Patent number: 7973352
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Patent number: 7964908
    Abstract: In one aspect, a memory cell includes a plurality of dielectric layers located within a charge storage gate structure. At least one of the dielectric layers includes an dielectric material including oxygen, and nano regions including oxygen embedded in the dielectric material, where an oxygen concentration of the dielectric material is the greater than an oxygen concentration of the nano regions. In another aspect, at least one of the dielectric layers includes a dielectric material and nano regions embedded in the dielectric material, where an atomic composition of the dielectric material is the same as the atomic composition of the nano regions, and a density of the dielectric material is the greater than a density of the nano regions.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: June 21, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-Jung Kim, Young-Sun Kim, Se-Hoon Oh, Eun-Ha Lee, Young-Su Chung
  • Publication number: 20110104907
    Abstract: Methods of forming a metal silicate layer and methods of fabricating a semiconductor device including the metal silicate layer are provided, the methods of forming the metal silicate layer include forming the metal silicate using a plurality of silicon precursors. The silicon precursors are homoleptic silicon precursors in which ligands bound to silicon have the same molecular structure.
    Type: Application
    Filed: October 22, 2010
    Publication date: May 5, 2011
    Inventors: Jong-cheol LEE, Ki-yeon PARK, Se-hoon OH, Youn-soo KIM
  • Patent number: 7820514
    Abstract: A method of forming a flash memory device can include forming a tunneling oxide film on a semiconductor substrate, forming a charge storing layer on the tunneling oxide film, forming a first blocking oxide film on the charge storing layer at a first temperature, forming a second blocking oxide film on the first blocking oxide film at a second temperature higher than the first temperature, and forming a gate electrode on the second blocking oxide film.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: October 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-kyung Ryu, Han-mei Choi, Seung-hwan Lee, Sun-jung Kim, Se-hoon Oh
  • Patent number: 7790591
    Abstract: Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating layer may be formed by forming a lower metal oxide layer at a first temperature and forming an upper metal oxide layer on the lower metal oxide layer at a second temperature, lower than the first temperature.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-chul Yoo, Myoung-bum Lee, Young-geun Park, Han-mei Choi, Se-hoon Oh, Byong-ju Kim, Kyong-won An, Seon-ho Jo
  • Publication number: 20100187655
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Application
    Filed: April 6, 2010
    Publication date: July 29, 2010
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Patent number: D732580
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: June 23, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh
  • Patent number: D733751
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh
  • Patent number: D733752
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh
  • Patent number: D733753
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh
  • Patent number: D733757
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh
  • Patent number: D733758
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh
  • Patent number: D733759
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Kim, Jong-Hyun Shin, Se-Hoon Oh