Patents by Inventor Se Hyeon HAN
Se Hyeon HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12292849Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.Type: GrantFiled: January 8, 2024Date of Patent: May 6, 2025Assignee: SK hynix Inc.Inventors: Yong Tae Jeon, Byung Cheol Kang, Seung Duk Cho, Sang Hyun Yoon, Se Hyeon Han, Jae Young Jang
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Patent number: 12216599Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) device and a method of operating the same. The PCIe device may include a performance analyzer, a delay time information generato and a command fetcher. The performance analyzer may measure throughputs of a plurality of functions, and generate throughput analysis information indicating a comparison result between the throughputs of the plurality of functions and throughput limits corresponding to the plurality of functions. The delay time information generator may generate a delay time for delaying a command fetch operation for each of the plurality of functions based on the throughput analysis information. The command fetcher may fetch a target command from a host based on a delay time of a function corresponding to the target command.Type: GrantFiled: January 3, 2022Date of Patent: February 4, 2025Assignee: SK hynix Inc.Inventors: Yong Tae Jeon, Ji Woon Yang, Sang Hyun Yoon, Se Hyeon Han
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Publication number: 20240289295Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.Type: ApplicationFiled: May 9, 2024Publication date: August 29, 2024Inventors: Yong Tae JEON, Byung Cheol KANG, Seung Duk CHO, Sang Hyun YOON, Se Hyeon HAN, Jae Young JANG
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Patent number: 12007918Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) interface device and a method of operating the same. The PCIe interface device may include a performance analyzer and a traffic class controller. The performance analyzer may be configured to measure throughputs of multiple functions executed on one or more Direct Memory Access (DMA) devices. The traffic class controller may be configured to allocate traffic class values to transaction layer packets received from the multiple functions based on the throughputs of the multiple functions.Type: GrantFiled: September 3, 2021Date of Patent: June 11, 2024Assignee: SK hynix Inc.Inventors: Yong Tae Jeon, Ji Woon Yang, Sang Hyun Yoon, Se Hyeon Han
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Publication number: 20240168911Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.Type: ApplicationFiled: January 8, 2024Publication date: May 23, 2024Inventors: Yong Tae JEON, Byung Cheol KANG, Seung Duk CHO, Sang Hyun YOON, Se Hyeon HAN, Jae Young JANG
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Patent number: 11983136Abstract: A Peripheral Component Interconnect Express (PCIe) device performing communication with a host through a PCIe link includes a first physical function, a plurality of second physical functions, and a function mode controller. The first physical function manages the PCIe link and receives function mode control information from the host. Each of the plurality of second physical functions may be enabled or disabled according to a respective operation mode. Based on the function mode control information, the function mode controller sets the operation modes of the plurality of second physical functions to one of an active mode and an inactive mode.Type: GrantFiled: October 19, 2021Date of Patent: May 14, 2024Assignee: SK hynix Inc.Inventors: Yong Tae Jeon, Sang Hyun Yoon, Se Hyeon Han
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Patent number: 11928070Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.Type: GrantFiled: October 20, 2021Date of Patent: March 12, 2024Assignee: SK hynix Inc.Inventors: Yong Tae Jeon, Byung Cheol Kang, Seung Duk Cho, Sang Hyun Yoon, Se Hyeon Han, Jae Young Jang
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Publication number: 20220327082Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.Type: ApplicationFiled: October 20, 2021Publication date: October 13, 2022Inventors: Yong Tae JEON, Byung Cheol KANG, Seung Duk CHO, Sang Hyun YOON, Se Hyeon HAN, Jae Young JANG
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Publication number: 20220327081Abstract: A Peripheral Component Interconnect Express (PCIe) device performing communication with a host through a PCIe link includes a first physical function, a plurality of second physical functions, and a function mode controller. The first physical function manages the PCIe link and receives function mode control information from the host. Each of the plurality of second physical functions may be enabled or disabled according to a respective operation mode. Based on the function mode control information, the function mode controller sets the operation modes of the plurality of second physical functions to one of an active mode and an inactive mode.Type: ApplicationFiled: October 19, 2021Publication date: October 13, 2022Inventors: Yong Tae JEON, Sang Hyun YOON, Se Hyeon HAN
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Publication number: 20220309014Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) interface device and a method of operating the same. The PCIe interface device may include a performance analyzer and a traffic class controller. The performance analyzer may be configured to measure throughputs of multiple functions executed on one or more Direct Memory Access (DMA) devices. The traffic class controller may be configured to allocate traffic class values to transaction layer packets received from the multiple functions based on the throughputs of the multiple functions.Type: ApplicationFiled: September 3, 2021Publication date: September 29, 2022Inventors: Yong Tae Jeon, Ji Woon Yang, Sang Hyun Yoon, Se Hyeon Han
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Publication number: 20220300442Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) device and a method of operating the same. The PCIe device may include a performance analyzer, a delay time information generato and a command fetcher. The performance analyzer may measure throughputs of a plurality of functions, and generate throughput analysis information indicating a comparison result between the throughputs of the plurality of functions and throughput limits corresponding to the plurality of functions. The delay time information generator may generate a delay time for delaying a command fetch operation for each of the plurality of functions based on the throughput analysis information. The command fetcher may fetch a target command from a host based on a delay time of a function corresponding to the target command.Type: ApplicationFiled: January 3, 2022Publication date: September 22, 2022Inventors: Yong Tae JEON, Ji Woon YANG, Sang Hyun YOON, Se Hyeon HAN