Abstract: A data processing device communicating with a memory device via a memory interface includes: at least one data processor configured to generate first data; a data converter configured to generate second data written to the memory device from the first data; and a controller configured to enable the data converter to generate the second data having a size less than that of the first data to reduce power consumption in at least one of the memory device or the memory interface.

Abstract: A data processing device communicating with a memory device via a memory interface includes: at least one data processor configured to generate first data; a data converter configured to generate second data written to the memory device from the first data; and a controller configured to enable the data converter to generate the second data having a size less than that of the first data.

Abstract: A method of encoding input data as a polar code includes generating unfrozen bits by adding at least one designated information bit to information bits which have been generated based on the input data, reordering the unfrozen bits and frozen bits by assigning the unfrozen bits to polarized sub-channels having higher reliability than the frozen bits having a value known to both of an encoder and a decoder, and generating a code word by polar-coding results of the reordering may be provided. The at least one designated information bit may have the value known to both the encoder and the decoder.

Abstract: A data processing device communicating with a memory device via a memory interface includes: at least one data processor configured to generate first data; a data converter configured to generate second data written to the memory device from the first data; and a controller configured to enable the data converter to generate the second data having a size less than that of the first data to reduce power consumption in at least one of the memory device or the memory interface.

Abstract: A method of encoding input data as a polar code includes generating unfrozen bits by adding at least one designated information bit to information bits which have been generated based on the input data, reordering the unfrozen bits and frozen bits by assigning the unfrozen bits to polarized sub-channels having higher reliability than the frozen bits having a value known to both of an encoder and a decoder, and generating a code word by polar-coding results of the reordering may be provided. The at least one designated information bit may have the value known to both the encoder and the decoder.

Abstract: An apparatus and method for reducing power consumption of a receiver by performing a Hybrid Automatic Repeat reQuest (HARQ) according to a detected decoding error are provided. The apparatus includes a decoding reliability metric generator for setting a decoding result as a decoding reliability metric, which is a reference value for determining a code block having a decoding error, based on a decoding result, a decoding reliability metric buffer for storing the decoding reliability metric set by the decoding reliability metric generator and a code block controller for, when the decoding error occurs, identifying code blocks having the decoding error by checking the decoding reliability metric and for controlling to decode the identified code blocks.

Abstract: A device and method for rate matching channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolutional code or a linear block code) and a systematic code (such as a turbo code). In one aspect, the rate matching device includes a plurality of rate matching blocks, the number of the rate matching blocks being equal to a reciprocal of a coding rate of a channel encoder. The rate matching device can rate match the symbols encoded with a non-systematic code or the symbols encoded with a systematic code, by changing initial parameters including the number of input symbols, the number of output symbols, and the puncturing or repetition pattern determining parameters.

Abstract: A channel coding and multiplexing apparatus and method in a CDMA communication system is disclosed. In the channel coding and multiplexing apparatus, each of a number of radio frame matchers (equal in number or greater than the number of transport channels) has a radio frame segmenter and segments each of transport channel frames that may have different transmission time intervals to radio frames. A multiplexer multiplexes the radio frames to form a serial data frame.

Abstract: A device and method for rate matching channel-encoded bits in a data communication system. The rate matching device includes a plurality of rate matching blocks, the number of the rate matching blocks being equal to a reciprocal of a coding rate of a channel encoder. The rate matching device can rate match the bits encoded with a non-systematic code or the bits encoded with a systematic code, by changing initial parameters including the number of input bits, the number of output bits, and the puncturing or repetition pattern determining parameters.

Abstract: A transmitting device including an encoder for receiving an information bit stream in a frame and outputting an information symbol, a first parity symbol, and a second parity symbol by encoding each information bit. An interleaver sequentially arranges the information symbols and the first and second parity symbols by rows in an array with an integer number of rows and an integer number of columns. The interleaver further outputs a plurality of radio frames in a stream, by reading the symbols by going down each column, starting at the leftmost column and proceeding right. Each radio frame has a predetermined size. A demultiplexer demultiplexes the radio frames received from the interleaver into streams of information, first parity symbols, and second parity symbols. A rate matcher bypasses the stream of information symbols and punctures the streams of the first and second parity symbols for rate matching.

Abstract: An apparatus and method for reducing power consumption of a receiver by performing a Hybrid Automatic Repeat reQuest (HARQ) according to a detected decoding error are provided. The apparatus includes a decoding reliability metric generator for setting a decoding result as a decoding reliability metric, which is a reference value for determining a code block having a decoding error, based on a decoding result, a decoding reliability metric buffer for storing the decoding reliability metric set by the decoding reliability metric generator and a code block controller for, when the decoding error occurs, identifying code blocks having the decoding error by checking the decoding reliability metric and for controlling to decode the identified code blocks.

Abstract: An apparatus and method for receiving a packet data control channel in a mobile communication system that transmits packet data and has the packet data control channel for transmitting control information related to transmission of packet data are provided. A receiver receives and despreads a signal on the packet data channel and a signal on the packet data control channel, separately outputs the signals, and estimates a noise of a received signal. A signal level detector receives a noise estimation value and samples of the packet data control channel signal from the receiver, and outputs a validity signal for detecting whether information is received over the packet data control channel. A packet data control channel decoder decodes the packet data control channel signal if the validity signal received from the signal level detector is valid.

Abstract: An apparatus and method for receiving control information transmitted from a transmitter using one of a plurality of slot lengths in a high-speed packet transmission mobile communication system is provided. The apparatus and method includes a decoder adapted to receive symbols by the slot, and generate at least one bit stream by decoding as many symbols of at least one possible slot length among a plurality of slot lengths according to a previous decoding result. An error checker adapted to perform error checking on the bit stream from the decoder. A controller is adapted to provide symbols of one more consecutive slot to the decoder, if the error checking failed, and acquire control information from the error checking-passed bit stream, if the error check passed. The decoder is further adapted to output at least one frame quality metric for the bit stream along with the bit stream.

Abstract: A device and method for rate matching channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolutional code or a linear block code) and a systematic code (such as a turbo code). In one aspect, the rate matching device includes a plurality of rate matching blocks, the number of the rate matching blocks being equal to a reciprocal of a coding rate of a channel encoder. The rate matching device can rate match the symbols encoded with a non-systematic code or the symbols encoded with a systematic code, by changing initial parameters including the number of input symbols, the number of output symbols, and the puncturing or repetition pattern determining parameters.

Abstract: A device and method for rate matching channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolutional code or a linear block code) and a systematic code (such as a turbo code). In one aspect, the rate matching device includes a plurality of rate matching blocks, the number of the rate matching blocks being equal to a reciprocal of a coding rate of a channel encoder. The rate matching device can rate match the symbols encoded with a non-systematic code or the symbols encoded with a systematic code, by changing initial parameters including the number of input symbols, the number of output symbols, and the puncturing or repetition pattern determining parameters.

Abstract: A channel coding and multiplexing apparatus and method in a CDMA communication system is disclosed. In the channel coding and multiplexing apparatus, each of a number of radio frame matchers (equal in number or greater than the number of transport channels) has a radio frame segmenter and segments each of transport channel frames that may have different transmission time intervals to radio frames. A multiplexer multiplexes the radio frames to form a serial data frame.

Abstract: A device and method for rate matching channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolutional code or a linear block code) and a systematic code (such as a turbo code). In one aspect, the rate matching device includes a plurality of rate matching blocks, the number of the rate matching blocks being equal to a reciprocal of a coding rate of a channel encoder. The rate matching device can rate match the symbols encoded with a non-systematic code or the symbols encoded with a systematic code, by changing initial parameters including the number of input symbols, the number of output symbols, and the puncturing or repetition pattern determining parameters.

Abstract: A channel coding and multiplexing apparatus and method in a CDMA communication system is disclosed. In the channel coding and multiplexing apparatus, each of a number of radio frame matchers (equal in number or greater than the number of transport channels) has a radio frame segmenter and segments each of transport channel frames that may have different transmission time intervals to radio frames. A multiplexer multiplexes the radio frames to form a serial data frame.

Abstract: A transmitting device including an encoder for receiving an information bit stream in a frame and outputting an information symbol, a first parity symbol, and a second parity symbol by encoding each information bit. An interleaver sequentially arranges the information symbols and the first and second parity symbols by rows in an array with an integer number of rows and an integer number of columns. The interleaver further outputs a plurality of radio frames in a stream, by reading the symbols by going down each column, starting at the leftmost column and proceeding right. Each radio frame has a predetermined size. A demultiplexer demultiplexes the radio frames received from the interleaver into streams of information, first parity symbols, and second parity symbols. A rate matcher bypasses the stream of information symbols and punctures the streams of the first and second parity symbols for rate matching.

Abstract: A transmitting device including an encoder for receiving an information bit stream in a frame and outputting an information symbol, a first parity symbol, and a second parity symbol by encoding each information bit. An interleaver sequentially arranges the information symbols and the first and second parity symbols by rows in an array with an integer number of rows and an integer number of columns. The interleaver further outputs a plurality of radio frames in a stream, by reading the symbols by going down each column, starting at the leftmost column and proceeding right. Each radio frame has a predetermined size. A demultiplexer demultiplexes the radio frames received from the interleaver into streams of information, first parity symbols, and second parity symbols. A rate matcher bypasses the stream of information symbols and punctures the streams of the first and second parity symbols for rate matching.