Abstract: Disclosed is an LCD having an integrated amorphous-silicon TFT row driver. The LCD includes at least one shift register integrated in an LCD panel. The LCD uses a reset signal by shifting phase of gate drive pulse in a gate line direction according to a clock period. The LCD has a 1-bit shift register having a dummy function formed at a final terminal of the shift register. An input signal of drive pulse is used as the reset signal of a shift register formed at a final terminal of a shift register row.

Abstract: Disclosed is a liquid crystal display in which a kick-back voltage of pixels used in the liquid crystal display. The liquid crystal display comprises thin film transistors connected to intersections between a plurality of data lines and a plurality of gate lines; pixel electrodes, each of which is connected to a source of each of the thin film transistors; common electrodes opposed to the pixel electrodes; liquid crystal injected between the pixel electrodes and the common electrodes; a plurality of auxiliary gate lines corresponding to the gate lines; and first capacitors, each of which is connected between the source and each of the auxiliary gate lines. By this construction, even if the voltage of a gate line goes down rapidly, it is possible to minimize variation width of a pixel voltage in the liquid crystal display.

Abstract: Disclosed is an LCD having an integrated amorphous-silicon TFT row driver. The LCD includes at least one shift register integrated in an LCD panel. The LCD uses a reset signal by shifting phase of gate drive pulse in a gate line direction according to a clock period. The LCD has a 1-bit shift register having a dummy function formed at a final terminal of the shift register. An input signal of drive pulse is used as the reset signal of a shift register formed at a final terminal of a shift register row.