Patents by Inventor Se-Jun Jeon

Se-Jun Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Signal processing method and system, and non-transitory computer-readable recording medium
    Patent number: 11368341
    Abstract: According to one aspect of the invention, there is provided a signal processing method, wherein a frame is generated in which at least one position of occurrence of a transition in a pulse value is determined from an input bitstream. According to another aspect of the invention, there is provided a signal processing method, wherein a frame including at least one pulse having a pulse width not less than a minimum pulse width is generated from an input bitstream.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: June 21, 2022
    Assignee: Korea Advanced Institute Of Science And Technology
    Inventors: Hyeon Min Bae, Se Jun Jeon
  • SIGNAL PROCESSING METHOD AND SYSTEM, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM
    Publication number: 20210051049
    Abstract: According to one aspect of the invention, there is provided a signal processing method, wherein a frame is generated in which at least one position of occurrence of a transition in a pulse value is determined from an input bitstream. According to another aspect of the invention, there is provided a signal processing method, wherein a frame including at least one pulse having a pulse width not less than a minimum pulse width is generated from an input bitstream.
    Type: Application
    Filed: February 11, 2019
    Publication date: February 18, 2021
    Applicant: Korea Advanced Institute Of Science And Technology
    Inventors: Hyeon Min BAE, Se Jun JEON
  • Folded reference voltage flash ADC and method thereof
    Patent number: 8570204
    Abstract: A folded reference voltage flash analog-to-digital (ADC) converter and a method thereof are provided. The flash ADC of the present invention determines the most significant bit (MSB) of an analog input signal, varies a reference voltage input to a plurality of comparators in accordance with the MSB determination result, and determines the remaining bits. Accordingly, input capacitance can be reduced while maintaining the size and power consumption of the ADC.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: October 29, 2013
    Assignees: Electronics and Telecommunications Research Institute, Korea Advanced Institute of Science and Technology
    Inventors: Hyun-Min Bae, Soon-Won Kwon, Se-Jun Jeon
  • FOLDED REFERENCE VOLTAGE FLASH ADC AND METHOD THEREOF
    Publication number: 20130002466
    Abstract: A folded reference voltage flash analog-to-digital (ADC) converter and a method thereof are provided. The flash ADC of the present invention determines the most significant bit (MSB) of an analog input signal, varies a reference voltage input to a plurality of comparators in accordance with the MSB determination result, and determines the remaining bits. Accordingly, input capacitance can be reduced while maintaining the size and power consumption of the ADC.
    Type: Application
    Filed: June 19, 2012
    Publication date: January 3, 2013
    Applicants: Korea Advanced Institute of Science and Technology, Electronics and Telecommunications Research Institute
    Inventors: Hyun-Min Bae, Soon-Won Kwon, Se-Jun Jeon