Abstract: A display apparatus and a control method thereof include an image communication camera including an image sensor is installed to be movable up and down at an upper portion of the display apparatus, and protrudes from the display apparatus when in use; an image processor processing an image signal sensed by the image sensor; a display displaying the processed image signal; a sensor sensing the position of the image communication camera; a power supply supplying components of the display apparatus; and a controller controlling the power supply to supply electric power to the image communication camera if the image communication camera is moved up, and cut off the electric power to the image communication camera if the image communication camera is moved down. Thus, it is possible to determine whether the image communication camera and the microphone operate or not based on the position of the image communication camera.

Abstract: The semiconductor device includes a CAM block including a plurality of vertical strings having a perpendicular configuration with respect to a semiconductor substrate, wherein each of the plurality of vertical strings is electrically coupled to a plurality of word lines and each of the plurality of word lines is electrically coupled to a plurality of CAM cells, a peripheral circuit configured to program CAM cells selected from the plurality of CAM cells, and a control circuit configured to issue at least one command to the peripheral circuit to simultaneously apply a program voltage to an nth word line, an n?1th word line and an n+1th word line to simultaneously program CAM cells electrically coupled to the n?1th word line, the nth word line and the n+1th word line, wherein the n?1th word line and an n+1th word line are adjacent to the nth word line and the selected CAM cells are electrically coupled to the nth word line.

Abstract: A semiconductor device includes a plurality of electrically coupled memory cells in a generally vertical configuration extending in a generally perpendicular direction from a semiconductor substrate, a peripheral circuit configured to program the memory cells, and a control circuit configured to program a memory cell selected from the plurality of memory cells to trap charge in the selected memory cell, and to issue at least one command to the peripheral circuit to manage a dispersion of at least a portion of the trapped charge between memory cells adjacent to the selected memory cell.

Abstract: The semiconductor device includes a CAM block including a plurality of vertical strings having a perpendicular configuration with respect to a semiconductor substrate, wherein each of the plurality of vertical strings is electrically coupled to a plurality of word lines and each of the plurality of word lines is electrically coupled to a plurality of CAM cells, a peripheral circuit configured to program CAM cells selected from the plurality of CAM cells, and a control circuit configured to issue at least one command to the peripheral circuit to simultaneously apply a program voltage to an nth word line, an n?1th word line and an n+1th word line to simultaneously program CAM cells electrically coupled to the n?1th word line, the nth word line and the n+1th word line, wherein the n?1th word line and an n+1th word line are adjacent to the nth word line and the selected CAM cells are electrically coupled to the nth word line.

Abstract: A display apparatus including a main body, a display panel installed in the main body, a video call unit installed to the main body, a circuit board for control of the video call unit, and a cable to connect the video call unit and the circuit board to each other, is provided. Installing the video call unit to the main body enables a video call via the display apparatus.

Abstract: An image sensor in accordance with exemplary embodiments of the inventive concept may include a pixel sensor array which includes an active pixel sensor and an optical black pixel sensor; a first analog to digital converter configured to convert a first sensing signal, which is provided from the active pixel sensor, to a first digital signal; a second analog to digital converter configured to convert a second sensing signal, which is provided from the optical black pixel sensor, to a second digital signal; and an output buffer configured to temporarily store and output the first digital signal and the second digital signal, wherein a plurality of noise characteristics of the second analog to digital converter is different from a plurality of noise characteristics of the first analog to digital converter.

Abstract: A display apparatus including a main body, a display panel installed in the main body, a video call unit installed to the main body, a circuit board for control of the video call unit, and a cable to connect the video call unit and the circuit board to each other, is provided. Installing the video call unit to the main body enables a video call via the display apparatus.

Abstract: A pixel array includes pixels arranged in a grid, with separate readout paths configured to readout image data from different subsets of the pixels in the array. An image sensor may employ image data from one subset of pixels, which may include fewer pixels than another subset of pixels in the array, to quickly form an image.

Abstract: A 3D non-volatile memory device includes a plate-type lower select line formed over a substrate, a lower select transistor formed in the lower select line, a plurality of memory cells stacked over the lower select transistor, an upper select transistor formed over the memory cells, and a line-type common source line formed over the substrate and spaced from the lower select line.

Abstract: A semiconductor memory device includes a plurality of memory blocks formed over a substrate including source regions and separated from each other by a slit, a plurality of bit lines coupled to the strings of the memory blocks and disposed over the memory blocks, and source contact lines formed within the slits, coupled to the source regions, respectively, and disposed in a direction to cross the plurality of bit lines.

Abstract: A 3D non-volatile memory device includes a plate-type lower select line formed over a substrate, a lower select transistor formed in the lower select line, a plurality of memory cells stacked over the lower select transistor, an upper select transistor formed over the memory cells, and a line-type common source line formed over the substrate and spaced from the lower select line.

Abstract: A display apparatus and a control method thereof include an image communication camera including an image sensor is installed to be movable up and down at an upper portion of the display apparatus, and protrudes from the display apparatus when in use; an image processor processing an image signal sensed by the image sensor; a display displaying the processed image signal; a sensor sensing the position of the image communication camera; a power supply supplying components of the display apparatus; and a controller controlling the power supply to supply electric power to the image communication camera if the image communication camera is moved up, and cut off the electric power to the image communication camera if the image communication camera is moved down. Thus, it is possible to determine whether the image communication camera and the microphone operate or not based on the position of the image communication camera.

Abstract: A broadcast receiving apparatus and method are provided, the appartus including a signal receiver which receives an analog broadcast signal in a radio frequency (RF) band; a sync signal detector which detects a sync signal area of the received broadcast signal; an interference signal detector which compares the sync signal area of the broadcast signal with a predetermined reference signal and detects an interference signal component; and an interference signal remover which removes the interference signal component from the broadcast signal based on the interference signal component detected from the sync signal area.

Abstract: Methods for generating a refresh signal in a semiconductor device and methods for performing a refresh operation in a semiconductor memory device are disclosed. A method for generating a refresh signal includes measuring a temperature of the semiconductor memory device, generating a temperature controlled voltage based on the measured temperature, generating an N-bit digital signal based on the temperature controlled voltage, and generating a refresh signal whose frequency is determined by the N-bit digital signal. The generation of the temperature controlled voltage includes generating a first current that is increased when the measured temperature is decreased and is decreased with the measured temperature is increased, and generating the temperature controlled voltage.

Abstract: A charge trap flash memory device is capable of preventing a data retention fail by ensuring a data retention margin. A method for operating the charge trap flash memory device is provided. A selected memory cell is programmed using a program voltage. The selected memory cell is verified using a first program verify voltage. Date retention states of selected memory cell having passed the program verify step are verified using a retention verify voltage. A read step of determining a program pass or fail by reading data of the selected memory cell having passed the retention verify step is performed using a read voltage.

Abstract: A method of operating a non-volatile memory device includes erasing a memory cell block, supplying a first drain turn-on voltage higher than a target level to the drain select line of the memory cell block, and performing a soft program operation by supplying a soft program voltage to the word lines of the memory cell block.

Abstract: A semiconductor memory device includes a plurality of memory blocks formed over a substrate including source regions and separated from each other by a slit, a plurality of bit lines coupled to the strings of the memory blocks and disposed over the memory blocks, and source contact lines formed within the slits, coupled to the source regions, respectively, and disposed in a direction to cross the plurality of bit lines.

Abstract: An orthogonal frequency division multiplexing (OFDM) signal transmission apparatus and a method thereof are disclosed. The OFDM signal transmission apparatus includes an inverse Fourier transform (IFT) unit for transforming a frequency domain OFDM signal to a time domain OFDM signal according to one of transmission modes of 4K, 16K, and 32K; a guard interval inserting unit for inserting a guard interval into the transformed time domain OFDM signal according to a predetermined guard interval inserting rate; and a transmitting unit for transmitting the OFDM signal having the guard interval. Therefore, the data transmission rate is enhanced.

Abstract: A NAND flash memory device and method of manufacturing the same is disclosed. Source and drain select transistor gates are recessed lower than an active region of a semiconductor substrate. A valid channel length of the source and drain select transistor gates is longer than a channel length of memory cell gates. Accordingly, an electric field between a source region and a drain region of the select transistor can be reduced. It is thus possible to prevent program disturbance from occurring in edge memory cells adjacent to the source and drain select transistors in non-selected cell strings.

Abstract: A memory device includes at least two cell blocks connected to a global bit line for outputting data in response to an instruction; at least one global bit line connection unit for selectively connecting the global bit line to each cell block under control of a control block, one global bit line connection unit being allocated between the two cell blocks; and said control block for controlling output of data stored in each cell block to the global bit line and restoration of the outputted data of the global bit line to the original cell block or another cell block which is determined by depending upon whether data in response to a next instruction is outputted from the original cell block or another cell block.