Patents by Inventor Se-kyeong LEE

Se-kyeong LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240091372
    Abstract: Described are anti-doppel antibody-drug conjugates, compositions comprising them, and related methods of treating doppel-associated diseases and conditions, including cancer.
    Type: Application
    Filed: July 18, 2023
    Publication date: March 21, 2024
    Applicants: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, OSONG MEDICAL INNOVATION FOUNDATION
    Inventors: Youngro BYUN, Ha Kyeong LEE, Seungwoo CHUNG, Byoung Mo KIM, So-Young CHOI, Se-Ra LEE
  • Patent number: 11912760
    Abstract: Described herein are doppel-targeting molecules (e.g., antibodies) useful for inhibiting pathological angiogenesis and treating diseases and conditions associated with pathological angiogenesis, such as tumors, cancers, atherosclerosis, tuberculosis, asthma, pulmonary arterial hypertension (PAH), neoplasms and neoplasm-related conditions, and for detecting doppel expression in a subject. Related compositions and methods also are described.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: February 27, 2024
    Assignee: PHAROSGEN CO., LTD
    Inventors: Youngro Byun, Ha Kyeong Lee, So Young Choi, So Ra Park, Se Ra Lee, Seung Il Baek
  • Patent number: 10707321
    Abstract: A power device, which has a Field Stop (FS) layer based on a semiconductor substrate between a collector region and a drift region in an FS-IGBT structure. The FS layer includes multiple implants for improved functionality of the power device.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: July 7, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kyu-hyun Lee, Se-kyeong Lee, Doo-seok Yoon, Soo-hyun Kang, Young-chul Choi
  • Publication number: 20190019879
    Abstract: In one general aspect, a power device can include a first Field Stop (FS) layer of a first conductivity type formed from a first-conductive-type semiconductor substrate. The first FS layer can include a first region having a constant impurity density profile along a depth direction and a second region having an impurity density profile along the depth direction lower than the impurity density profile of the first region. The power device can include a second FS layer of the first conductivity type disposed on a first surface of the first FS layer. The second FS layer can include a first implanted FS layer having an impurity density higher than an impurity density of the first FS layer, and a second implanted FS layer having an impurity density lower than the first implanted FS layer. The second implanted FS layer can be disposed between the first FS layer and the first implanted FS layer. The power device can include a transistor device having components disposed on the second FS layer.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 17, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kyu-hyun LEE, Se-kyeong LEE, Doo-seok YOON, Soo-hyun KANG, Young-chul CHOI
  • Patent number: 10109719
    Abstract: In one general aspect, a method of fabricating a power device can include preparing a semiconductor substrate of a first conductivity type, and forming a first Field Stop (FS) layer and a second FS layer.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: October 23, 2018
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Kyu-hyun Lee, Se-kyeong Lee, Doo-seok Yoon, Soo-hyun Kang, Young-chul Choi
  • Publication number: 20170117384
    Abstract: In one general aspect, a method of fabricating a power device can include preparing a semiconductor substrate of a first conductivity type, and forming a first Field Stop (FS) layer and a second FS layer.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Kyu-hyun LEE, Se-kyeong LEE, Doo-seok YOON, Soo-hyun KANG, Young-chul CHOI
  • Publication number: 20130277793
    Abstract: A power device, which has a Field Stop (FS) layer based on a semiconductor substrate between a collector region and a drift region in an FS-IGBT structure, wherein the thickness of the FS layer and the impurity density of the collector region are easy to adjust and the FS layer has an improved function, and a fabricating method thereof.
    Type: Application
    Filed: April 23, 2013
    Publication date: October 24, 2013
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Kyu-hyun LEE, Se-kyeong LEE, Doo-seok YOON, Soo-hyun KANG, Young-chul CHOI