Patents by Inventor Se-Myung Kwon
Se-Myung Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230189568Abstract: An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer.Type: ApplicationFiled: February 7, 2023Publication date: June 15, 2023Inventors: Woo Ho JEONG, SE MYUNG KWON, YOON HO KIM, SEOK JE SEONG, JOON HOO CHOI
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Patent number: 11600678Abstract: An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer.Type: GrantFiled: May 4, 2021Date of Patent: March 7, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Woo Ho Jeong, Se Myung Kwon, Yoon Ho Kim, Seok Je Seong, Joon Hoo Choi
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Patent number: 11417686Abstract: The present disclosure relates to a display substrate. The display substrate may include a substrate, a first lower gate electrode, an insulation pattern, a first insulation layer, and a first active pattern. The first lower gate electrode may be disposed on the substrate. The insulation pattern may be disposed on and patterned to correspond to the first lower gate electrode and may include a silicon nitride. The first insulation layer may be disposed on the insulation pattern and may include a silicon oxide. The first active pattern may be on the first insulation layer and formed of oxide semiconductor and may include a first channel region overlapping the first lower gate electrode and a first wiring region disposed on a side of the first channel region.Type: GrantFiled: September 21, 2020Date of Patent: August 16, 2022Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Se Myung Kwon, Duk Young Kim, Young Kuk Kim, Cheol Su Kim, Yu Ri Oh
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Publication number: 20210280613Abstract: The present disclosure relates to a display substrate. The display substrate may include a substrate, a first lower gate electrode, an insulation pattern, a first insulation layer, and a first active pattern. The first lower gate electrode may be disposed on the substrate. The insulation pattern may be disposed on and patterned to correspond to the first lower gate electrode and may include a silicon nitride. The first insulation layer may be disposed on the insulation pattern and may include a silicon oxide. The first active pattern may be on the first insulation layer and formed of oxide semiconductor and may include a first channel region overlapping the first lower gate electrode and a first wiring region disposed on a side of the first channel region.Type: ApplicationFiled: September 21, 2020Publication date: September 9, 2021Inventors: Se Myung KWON, Duk Young KIM, Young Kuk KIM, Cheol Su KIM, Yu Ri OH
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Patent number: 10998393Abstract: An organic fight-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer.Type: GrantFiled: March 18, 2020Date of Patent: May 4, 2021Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Woo Ho Jeong, Se Myung Kwon, Yoon Ho Kim, Seok Je Seong, Joon Hoo Choi
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Publication number: 20200219954Abstract: An organic fight-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer.Type: ApplicationFiled: March 18, 2020Publication date: July 9, 2020Inventors: Woo Ho JEONG, Se Myung KWON, Yoon Ho KIM, Seok Je SEONG, Joon Hoo CHOI
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Patent number: 10622430Abstract: An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer.Type: GrantFiled: February 7, 2019Date of Patent: April 14, 2020Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Woo Ho Jeong, Se Myung Kwon, Yoon Ho Kim, Seok Je Seong, Joon Hoo Choi
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Publication number: 20190378886Abstract: An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer.Type: ApplicationFiled: February 7, 2019Publication date: December 12, 2019Inventors: Woo Ho Jeong, Se Myung Kwon, Yoon Ho Kim, Seok Je Seong, Joon Hoo Choi
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Patent number: 9406807Abstract: Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.Type: GrantFiled: May 29, 2014Date of Patent: August 2, 2016Assignee: Samsung Display Co., Ltd.Inventors: Joo-Han Kim, Hwa-Dong Jung, Wan-Soon Lim, Jee-Hun Lim, Joo Seok Yeom, Tae-Kyung Yim, Jae-Hak Lee, Hyuk Soon Kwon, Hyoung Cheol Lee, Jeong-Ju Park, Se-Myung Kwon, So-Young Koo
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Publication number: 20160204135Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a gate line disposed on a substrate and including a gate electrode; a gate insulating layer formed on the gate line; a first oxide semiconductor layer disposed on the gate insulating layer and formed of an oxide semiconductor; a data wiring layer disposed on the gate insulating layer and including data line intersecting with the gate line, a source electrode connected to the data line, and a drain electrode facing the drain electrode; and a second oxide semiconductor layer covering the source electrode and the drain electrode, wherein the data wiring layer includes copper or a copper alloy.Type: ApplicationFiled: October 27, 2015Publication date: July 14, 2016Inventors: Hyung Min KIM, NAM JUNE KIM, Jae Hyoung YOUN, Jang Soo KIM, Se Myung KWON, Kang-Young LEE
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Patent number: 9368518Abstract: A thin film transistor array panel includes: a gate conductor disposed on a substrate and including a gate line and a gate electrode, a semiconductor layer overlapping the gate electrode and including an oxide semiconductor, a data conductor including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, a sidewall covering side surface parts of the drain electrode and the source electrode adjacent to a channel region of the semiconductor layer, and a passivation layer covering the source electrode, the drain electrode, and the sidewall.Type: GrantFiled: June 13, 2014Date of Patent: June 14, 2016Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Doo Youl Lee, Se Myung Kwon, Hyuk Soon Kwon, Jang Soo Kim, Hyung Min Kim, Jin-Ho Oh
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Patent number: 9178024Abstract: A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.Type: GrantFiled: May 4, 2012Date of Patent: November 3, 2015Assignee: Samsung Display Co., Ltd.Inventors: Ki-Won Kim, Kap Soo Yoon, Woo Geun Lee, Jin-Won Lee, Se-Myung Kwon, Jung Ouck Ahn, Si Jin Kim
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Publication number: 20150200208Abstract: A thin film transistor array panel includes: a gate conductor disposed on a substrate and including a gate line and a gate electrode, a semiconductor layer overlapping the gate electrode and including an oxide semiconductor, a data conductor including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, a sidewall covering side surface parts of the drain electrode and the source electrode adjacent to a channel region of the semiconductor layer, and a passivation layer covering the source electrode, the drain electrode, and the sidewall.Type: ApplicationFiled: June 13, 2014Publication date: July 16, 2015Inventors: DOO YOUL LEE, SE MYUNG KWON, HYUK SOON KWON, JANG SOO KIM, HYUNG MIN KIM, JIN-HO HO
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Publication number: 20140264350Abstract: Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.Type: ApplicationFiled: May 29, 2014Publication date: September 18, 2014Applicant: Samsung Display Co., Ltd.Inventors: Joo-Han KIM, Hwa-Dong Jung, Wan-Soon Lim, Jee-Hun Lim, Joo Seok Yeom, Tae-Kyung Yim, Jae-Hak Lee, Hyuk Soon Kwon, Hyoung Cheol Lee, Jeong-Ju Park, Se-Myung Kwon, So-Young Koo
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Patent number: 8741672Abstract: Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.Type: GrantFiled: June 27, 2012Date of Patent: June 3, 2014Assignee: Samsung Display Co., Ltd.Inventors: Joo-Han Kim, Hwa-Dong Jung, Wan-Soon Lim, Jee-Hun Lim, Joo Seok Yeom, Tae-Kyung Yim, Jae-Hak Lee, Hyuk Soon Kwon, Hyoung Cheol Lee, Jeong-Ju Park, Se-Myung Kwon, So-Young Koo
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Publication number: 20130146864Abstract: A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.Type: ApplicationFiled: May 4, 2012Publication date: June 13, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Ki-Won KIM, Kap Soo YOON, Woo Geun LEE, Jin-Won LEE, Se-Myung KWON, Jung Ouck AHN, Si Jin KIM
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Publication number: 20130037813Abstract: Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.Type: ApplicationFiled: June 27, 2012Publication date: February 14, 2013Applicant: Samsung Display Co., Ltd.Inventors: Joo-Han Kim, Hwa-Dong Jung, Wan-Soon Lim, Jee-Hun Lim, Joo Seok Yeom, Tae-Kyung Yim, Jae-Hak Lee, Hyuk Soon Kwon, Hyoung Cheol Lee, Jeong-Ju Park, Se-Myung Kwon, So-Young Koo
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Publication number: 20120091461Abstract: A thin film transistor display substrate and a method of manufacturing the same are provided. The thin film transistor substrate includes a gate electrode formed on a display substrate, an active layer formed on the gate electrode to overlap with the gate electrode and including polycrystalline silicon, a first ohmic contact layer formed on the active layer, a second ohmic contact layer formed on the first ohmic contact layer, and a source electrode and a drain electrode each formed on the second ohmic contact layer.Type: ApplicationFiled: August 26, 2011Publication date: April 19, 2012Inventors: Joo-Han KIM, Wan-Soon Im, Jae-Hak Lee, Se-Myung Kwon, So-Young Koo