Abstract: Disclosed are diagnostic markers specific for acute myeloid leukemia (AML), B-cell lineage acute lymphoblastic leukemia (B-ALL), and T-cell lineage acute lymphoblastic leukemia (T-ALL). Also disclosed are a composition and a kit, comprising an agent detecting the presence of the markers, and a method of diagnosing AML, B-ALL and T-ALL using the same.

Abstract: Disclosed is a diagnostic marker specific for lung cancer. Also, the present invention relates to a composition and a kit, comprising an agent measuring the presence of the marker, and a method of diagnosing lung cancer using the composition or kit.

Abstract: Disclosed is a diagnostic marker specific for lung cancer. Also, the present invention relates to a composition and a kit, comprising an agent measuring the presence of the marker, and a method of diagnosing lung cancer using the composition or kit.

Abstract: Disclosed is a semiconductor device packaging technique that is capable of resolving a problem of instability of bonding wires when stacking a plurality of semiconductor chips. The technique is also capable of realizing a slim, light and small package. The semiconductor device package includes a substrate having a substrate pad on a surface thereof, one or more memory chips stacked on the substrate with each memory chip having a pad connected to a common pin receiving a common signal applied to all the memory chips, an interposer chip stacked on the substrate and having an interconnection wire connected to the memory chip pad, the common pin of each of the memory chips being electrically connected to the interconnection wire via the memory chip pad, and a logic chip stacked on the substrate and having a bypass circuit which electrically connects or disconnects the interconnection wire to or from the substrate pad.

Abstract: A method of manufacturing a multi-stack package that ensures easy application of a solder paste or a flux. The method includes forming a first package comprising a first substrate on which bumps are arranged and a second package comprising a second substrate on which electrode pads corresponding to the bumps are arranged, applying a solder paste on the bumps of the first package, and electrically connecting the bumps of the first package and the electrode pads of the second package.

Abstract: Disclosed is a semiconductor device packaging technique that is capable of resolving a problem of instability of bonding wires when stacking a plurality of semiconductor chips. The technique is also capable of realizing a slim, light and small package. The semiconductor device package includes a substrate having a substrate pad on a surface thereof, one or more memory chips stacked on the substrate with each memory chip having a pad connected to a common pin receiving a common signal applied to all the memory chips, an interposer chip stacked on the substrate and having an interconnection wire connected to the memory chip pad, the common pin of each of the memory chips being electrically connected to the interconnection wire via the memory chip pad, and a logic chip stacked on the substrate and having a bypass circuit which electrically connects or disconnects the interconnection wire to or from the substrate pad.

Abstract: A multi-chip package includes a substrate having first and second substrate pads, ball pads electrically connected to the first and second substrate pads, a first chip attached on the substrate and having first chip pads flip-chip bonded to the first substrate pads, and a second chip attached on the first chip and having second chip pads wire-bonded to the second substrate pads. The second chip may have overhang portions. Solder balls may be formed on the ball pads and act as external connection terminals. A support member may be interposed between the first chip and the second chip to support the overhang portions of the second chip.

Abstract: A method of manufacturing a multi-stack package that ensures easy application of a solder paste or a flux. The method includes forming a first package comprising a first substrate on which bumps are arranged and a second package comprising a second substrate on which electrode pads corresponding to the bumps are arranged, applying a solder paste on the bumps of the first package, and electrically connecting the bumps of the first package and the electrode pads of the second package.

Abstract: A die bonding apparatus may include a bond head providing a heating function. The bond head may include a die collet for picking up a semiconductor chip when performing a die bonding process. The die collet may heat the semiconductor chip by using heat transmitted from the bond head when picking up the chip. The die collet may also provide a heating function for heating the chip.