Abstract: Disclosed herein are a smart plug-based power management method for preventing a power failure and an apparatus for the method. The power management method includes acquiring load amount information for each of multiple loads corresponding to power management targets, checking a maximum amount of power that is capable of being generated by a solar power generator, setting a power supply mode based on at least one of whether power is being supplied from a power system and a result of a comparison of the load amount information with the maximum amount of power, and performing power management so as to prevent a power failure by interrupting a supply of power so as to correspond to the power supply mode based on multiple smart plugs for controlling corresponding ones of the multiple loads.

Abstract: A power conversion apparatus includes a first power conversion unit for converting power produced by a power generation device while being connected to the power generation device and transmitting converted power to any one of a grid and an energy storage device, a second power conversion unit for converting power discharged from the energy storage device while being connected to the energy storage device and transmitting converted power to the first power conversion unit, and a switch control unit for switching the first power conversion unit to any one of the grid and the energy storage device depending on a state of the grid and then transmitting power of the first power conversion unit.

Abstract: Disclosed herein are a smart plug-based power management method for preventing a power failure and an apparatus for the method. The power management method includes acquiring load amount information for each of multiple loads corresponding to power management targets, checking a maximum amount of power that is capable of being generated by a solar power generator, setting a power supply mode based on at least one of whether power is being supplied from a power system and a result of a comparison of the load amount information with the maximum amount of power, and performing power management so as to prevent a power failure by interrupting a supply of power so as to correspond to the power supply mode based on multiple smart plugs for controlling corresponding ones of the multiple loads.

Abstract: A system for configuring low-power wireless network is disclosed. The system includes at least one wireless device configured to be used in a low-power wireless network and be assigned to a new network identifier and a new device identifier; a network coordinator configured to manage the low-power wireless network using the new network identifier and the new device identifier; and a mobile terminal configured to search for the wireless device and assign the new network identifier and the new device identifier to the searched wireless device and transmit the new network identifier and the new device identifier to the network coordinator.

Abstract: Disclosed is an energy storage system provided with a wired and wireless energy transfer function. The energy storage system includes: an energy input unit to which energy generated from a plurality of energy sources is input; an energy input control unit for selecting one energy source from among the plurality of energy sources, and transferring energy of the selected energy source through operation in a wired operation mode or a wireless operation mode; a wireless energy transmitting/receiving unit for wirelessly transmitting/receiving the energy of the selected energy source during the operation in the wireless operation mode of the energy input control unit; an energy storage/control unit for storing the energy of the selected energy source; an energy output unit for consuming the energy stored in the energy storage/control unit; and an energy output control unit for distributing the energy stored in the energy storage/control unit to the energy output unit.

Abstract: Disclosed is an energy storage system provided with a wired and wireless energy transfer function. The energy storage system includes: an energy input unit to which energy generated from a plurality of energy sources is input; an energy input control unit for selecting one energy source from among the plurality of energy sources, and transferring energy of the selected energy source through operation in a wired operation mode or a wireless operation mode; a wireless energy transmitting/receiving unit for wirelessly transmitting/receiving the energy of the selected energy source during the operation in the wireless operation mode of the energy input control unit; an energy storage/control unit for storing the energy of the selected energy source; an energy output unit for consuming the energy stored in the energy storage/control unit; and an energy output control unit for distributing the energy stored in the energy storage/control unit to the energy output unit.

Abstract: An apparatus and method for extracting maximum power from a solar cell are provided. The apparatus includes a solar cell for producing power from solar energy, a maximum power extractor for generating a pulse width modulation signal for extracting the maximum power from the solar cell, and a DC-DC converter for adjusting an amount of current generated from the solar cell according to the pulse width modulation signal.

Abstract: Provided is an energy and power management integrated circuit (IC) device. The energy and power management IC device includes a plurality of energy conversion devices for harvesting energy from respective energy conversion sources and converting the energy into electric energy, an energy management IC (EMIC) for converting the electric energy converted by the energy conversion devices into stable energy, a storage device for storing the energy or power converted by the EMIC, a power management IC (PMIC) for receiving and distributing the power stored in the storage device, and a plurality of output load devices for consuming the power distributed by the PMIC. Accordingly, it is possible to harvest energy in an environmentally friendly way and semi-permanently use the energy without changing a battery.

Abstract: Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.

Abstract: Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.

Abstract: Provided is a low power consumption processor. The processor includes: a plurality of blocks; a memory storing instructions that control each of the plurality of blocks; and a multi power controller generates a signal that activates at least one of the plurality of blocks according to an address storing the instruction, and provides a normal power voltage or a reduction power voltage in response to the activation signal.

Abstract: Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.

Abstract: Provided are a flexible thermoelectric generator, a wireless sensor node including the same and a method of manufacturing the same. The flexible thermoelectric generator includes a plurality of P-type semiconductors and a plurality of N-type semiconductors, which are alternately arranged, an upper metal for connecting upper surfaces of the adjacent P-type semiconductor and N-type semiconductor, a lower metal for connecting lower surfaces of the adjacent P-type semiconductor and N-type semiconductor, and alternately disposed with respect to the upper metal, a P-type metal connected to at least one P-type semiconductor among the plurality of P-type semiconductors, and an N-type metal connected to at least one N-type semiconductor among the plurality of N-type semiconductors.

Abstract: An apparatus and method for decoding moving images based on parallel processing are provided. The apparatus for decoding images based on parallel processing can improve operational performance by pipelining massive-data transmission between processors while performing context-adaptive variable length decoding (CAVLD), inverse quantization (IQ), inverse transformation (IT), motion compensation (MC), intra prediction (IP) and deblocking filter (DF) operations in parallel in units of pluralities of macroblocks (MBs).

Abstract: An apparatus and method for extracting maximum power from a solar cell are provided. The apparatus includes a solar cell for producing power from solar energy, a maximum power extractor for generating a pulse width modulation signal for extracting the maximum power from the solar cell, and a DC-DC converter for adjusting an amount of current generated from the solar cell according to the pulse width modulation signal.

Abstract: Provided is a bit stream processor using a reduced table lookup. The bit stream processor includes a bit stream exclusive register in a general purpose register in order to process data of a variable length effectively. Additionally, the bit stream processor an instruction of a table lookup method to which a prefix method is applied and a bit stream exclusive instruction in order to reduce an entire memory size.

Abstract: Provided is an energy and power management integrated circuit (IC) device. The energy and power management IC device includes a plurality of energy conversion devices for harvesting energy from respective energy conversion sources and converting the energy into electric energy, an energy management IC (EMIC) for converting the electric energy converted by the energy conversion devices into stable energy, a storage device for storing the energy or power converted by the EMIC, a power management IC (PMIC) for receiving and distributing the power stored in the storage device, and a plurality of output load devices for consuming the power distributed by the PMIC. Accordingly, it is possible to harvest energy in an environmentally friendly way and semi-permanently use the energy without changing a battery.

Abstract: Provided is a data processing circuit. A control unit outputs an operation control signal and a memory control signal. A plurality of program memories each outputs a command in response to the memory control signal. A plurality of arithmetic sections each selectively performs any one of the commands from the plurality of program memories in response to the operation control signal. Operation modes of the data processing circuit can be flexibly changed according to operation environments.

Abstract: Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.

Abstract: Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.