Abstract: A test device for detecting and measuring distance to passive intermodulation (PIM) is disclosed. The test device may comprise a receiver to receive a signal from a test point of a distributed cell site comprising a remote radio head (RRH) and a baseband unit (BBU) separated and connected via an optical feeder. The test device may also comprise a processor to detect passive intermodulation (PIM) and measure distance to the PIM (internal or external). For example, the processor may replace downlink IQ data in the signal with two-tone waveform IQ data, transmit the two-tone waveform IQ data to the RRH, and to monitor uplink spectrum to detect PIM, where the uplink spectrum may comprise uplink IQ data from the RRH. The processor may also perform uplink spectrum analysis using radio frequency (RF) monitoring, measure a time delay for the two-tone waveform and the detected PIM, and calculate a distance to the PIM based on the time delay.

Abstract: A test device for detecting and measuring distance to passive intermodulation (PIM) is disclosed. The test device may comprise a receiver to receive a signal from a test point of a distributed cell site comprising a remote radio head (RRH) and a baseband unit (BBU) separated and connected via an optical feeder. The test device may also comprise a processor to detect passive intermodulation (PIM) and measure distance to the PIM (internal or external). For example, the processor may replace downlink IQ data in the signal with two-tone waveform IQ data, transmit the two-tone waveform IQ data to the RRH, and to monitor uplink spectrum to detect PIM, where the uplink spectrum may comprise uplink IQ data from the RRH. The processor may also perform uplink spectrum analysis using radio frequency (RF) monitoring, measure a time delay for the two-tone waveform and the detected PIM, and calculate a distance to the PIM based on the time delay.

Abstract: There is disclose an integrated repeater system including a master unit (MU) to multiplex and transmit a first signal received from a first equipment and a second signal received from a second equipment to a frame usable for an Ethernet PHY chip; and a remote unit (RU) to demultiplex the frame received from the master unit to the first signal and the second signal and to control the first signal to be transmitted to a first terminal and the second signal to be transmitted to a second terminal.

Abstract: Circuit and method for timing recovery in a digital communication receiver for improving a BER performance and having a faster data transmission rate, the timing recovery circuit for recovering a synchronous timing signal of a PN code from an output of a matched filter in the digital communication receiver, including a power calculation circuit for receiving an output of the matched filter and calculating a power of a PN code signal for each sample period in each symbol period, a maximal power position detection circuit for detecting a sample position at which a symbol period has a maximum power value, a symbol position tracking circuit for tracking and setting an optimal symbol position value, a modulo counter for rotating as many as a number of samples in one symbol period in counting the samples for providing a reference position of samples, and a comparator for comparing the present symbol position value from the symbol position tracking circuit and a count value from the modulo counter, and generating a