Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.

Abstract: A method for fabricating a non-volatile memory device, the method includes alternately stacking inter-layer dielectric layers and sacrificial layers over a substrate, etching the inter-layer dielectric layers and the sacrificial layers to form trenches to expose a surface of the substrate, etching the inter-layer dielectric layers exposed by the trenches to a predetermined thickness, forming junction layers over etched portions of the inter-layer dielectric layers, and burying a layer for a channel within the trenches in which the junction layers have been formed to form a channel.

Abstract: A semiconductor memory device includes a lower select transistor formed within a semiconductor substrate, memory cells stacked over the lower select transistors, and an upper select transistor formed over the memory cells.

Abstract: A 3D nonvolatile memory device includes a plurality of channel structures each comprising a plurality of channel layers and interlayer dielectric layers which are alternately stacked, a plurality of channel contacts coupled to the plurality of channel layers, respectively, and a plurality of selection lines vertically-coupled to the plurality of channel contacts and crossing over the plurality of channel structures.

Abstract: A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.

Abstract: A semiconductor memory device includes a lower select transistor formed within a semiconductor substrate, memory cells stacked over the lower select transistors, and an upper select transistor formed over the memory cells.

Abstract: A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.

Abstract: Disclosed is a method for programming a flash memory device capable of preventing a threshold voltage distribution of a memory cell from being moved due to a pass disturbance of the memory cell programmed initially at a program operation performed on a page-unit basis. The method for programming a NAND flash memory device including a plurality of cell strings having N memory cells connected, in which gates of the memory cells are connected to a word line, the method is performed by applying a program voltage to at least two word lines simultaneously including a selected word line.

Abstract: A 3D nonvolatile memory device includes a plurality of channel structures each comprising a plurality of channel layers and interlayer dielectric layers which are alternately stacked, a plurality of channel contacts coupled to the plurality of channel layers, respectively, and a plurality of selection lines vertically-coupled to the plurality of channel contacts and crossing over the plurality of channel structures.

Abstract: A method for fabricating a non-volatile memory device, the method includes alternately stacking inter-layer dielectric layers and sacrificial layers over a substrate, etching the inter-layer dielectric layers and the sacrificial layers to form trenches to expose a surface of the substrate, etching the inter-layer dielectric layers exposed by the trenches to a predetermined thickness, forming junction layers over etched portions of the inter-layer dielectric layers, and burying a layer for a channel within the trenches in which the junction layers have been formed to form a channel.

Abstract: A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.

Abstract: Disclosed is a method for programming a flash memory device capable of preventing a threshold voltage distribution of a memory cell from being moved due to a pass disturbance of the memory cell programmed initially at a program operation performed on a page-unit basis. The method for programming a NAND flash memory device including a plurality of cell strings having N memory cells connected, in which gates of the memory cells are connected to a word line, the method is performed by applying a program voltage to at least two word lines simultaneously including a selected word line.