Patents by Inventor Sean Batty
Sean Batty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11265011Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: March 24, 2020Date of Patent: March 1, 2022Assignee: Marvell Asia Pte, Ltd.Inventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
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Publication number: 20200228139Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: March 24, 2020Publication date: July 16, 2020Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
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Patent number: 10637501Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: January 30, 2019Date of Patent: April 28, 2020Assignee: INPHI CORPORATIONInventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
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Publication number: 20190165806Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: January 30, 2019Publication date: May 30, 2019Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
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Patent number: 10236907Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: May 16, 2018Date of Patent: March 19, 2019Assignee: INPHI CORPORATIONInventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
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Publication number: 20180262209Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: May 16, 2018Publication date: September 13, 2018Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
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Patent number: 9998146Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: October 28, 2016Date of Patent: June 12, 2018Assignee: INPHI CORPORATIONInventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
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Publication number: 20180123613Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: October 28, 2016Publication date: May 3, 2018Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
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Patent number: 9705666Abstract: The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.Type: GrantFiled: February 15, 2017Date of Patent: July 11, 2017Assignee: INPHI CORPORATIONInventors: Simon Forey, Parmanand Mishra, Sean Batty
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Publication number: 20170163408Abstract: The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.Type: ApplicationFiled: February 15, 2017Publication date: June 8, 2017Inventors: Simon FOREY, Parmanand MISHRA, Sean BATTY
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Patent number: 9608799Abstract: The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.Type: GrantFiled: July 19, 2016Date of Patent: March 28, 2017Assignee: INPHI CORPORATIONInventors: Simon Forey, Parmanand Mishra, Sean Batty
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Publication number: 20160330015Abstract: The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.Type: ApplicationFiled: July 19, 2016Publication date: November 10, 2016Inventors: Simon FOREY, Parmanand MISHRA, Sean BATTY
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Patent number: 9413523Abstract: The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.Type: GrantFiled: April 24, 2015Date of Patent: August 9, 2016Assignee: INPHI CORPORATIONInventors: Simon Forey, Parmanand Mishra, Sean Batty
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Patent number: 7894491Abstract: A data transfer circuit is provided for sending digital data at high rates across short but significant distances within an integrated circuit. The data is sent on parallel conductors that are divided into a number of groups. At the receiving end, a multiplexer selects each of the groups in turn and presents them at a set of conductors that are the same in number as one of the groups. At the transmitting end, a data marshalling circuit takes the bitstream to be transmitted and places it on the conductors in a particular redundant fashion so that the bitstream appears to advance across the set of outputs of the multiplexer. That is particularly useful where those outputs are presented to a pre-emphasis filter and line driver. The apparent data rate can be changed by making two or more of the groups of conductors have identical data.Type: GrantFiled: February 8, 2008Date of Patent: February 22, 2011Assignee: Texas Instruments IncorporatedInventors: Sean Batty, Bhajan Singh, Derek Colman
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Publication number: 20080212607Abstract: A data transfer circuit is provided for sending digital data at high rates across short but significant distances within an integrated circuit. The data is sent on parallel conductors that are divided into a number of groups. At the receiving end, a multiplexer selects each of the groups in turn and presents them at a set of conductors that are the same in number as one of the groups. At the transmitting end, a data marshalling circuit takes the bitstream to be transmitted and places it on the conductors in a particular redundant fashion so that the bitstream appears to advance across the set of outputs of the multiplexer. That is particularly useful where those outputs are presented to a pre-emphasis filter and line driver. The apparent data rate can be changed by making two or more of the groups of conductors have identical data.Type: ApplicationFiled: February 8, 2008Publication date: September 4, 2008Inventors: Sean Batty, Bhajan Singh, Derek Colman
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Publication number: 20080212606Abstract: A data transfer circuit is provided for sending digital data at high rates across short but significant distances within an integrated circuit. The data is sent on parallel conductors that are divided into a number of groups. At the receiving end, a multiplexer selects each of the groups in turn and presents them at a set of conductors that are the same in number as one of the groups. At the transmitting end, a data marshalling circuit takes the bitstream to be transmitted and places it on the conductors in a particular redundant fashion so that the bitstream appears to advance across the set of outputs of the multiplexer. That is particularly useful where those outputs are presented to a pre-emphasis filter and line driver. The apparent data rate can be changed by making two or more of the groups of conductors have identical data.Type: ApplicationFiled: February 8, 2008Publication date: September 4, 2008Inventor: Sean Batty