Patents by Inventor Sean C. DARDIS

Sean C. DARDIS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10571992
    Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: February 25, 2020
    Assignee: Intel Corporation
    Inventors: Robert E. Gough, Mazen G. Gedeon, Barnes Cooper, Basavaraj B. Astekar, Sean C. Dardis
  • Patent number: 10224003
    Abstract: Systems, apparatuses and methods may provide for technology that based on information from a connected display device, forms a determination whether to connect a discrete graphics processor or an integrated graphics processor to the connected display device, the information corresponding to whether the connected display device is to be driven by the integrated graphics processor or the discrete graphics processor.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: March 5, 2019
    Assignee: Intel Corporation
    Inventors: James E. Akiyama, Sean C. Dardis, Srikanth Kambhatla
  • Patent number: 9965293
    Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: May 8, 2018
    Assignee: INTEL CORPORATION
    Inventors: Nathaniel L. Desimone, Robert E. Gough, Sean C. Dardis
  • Publication number: 20180046240
    Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.
    Type: Application
    Filed: June 27, 2017
    Publication date: February 15, 2018
    Inventors: Robert E. GOUGH, Mazen G. GEDEON, Barnes COOPER, Basavaraj B. ASTEKAR, Sean C. DARDIS
  • Patent number: 9696785
    Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.
    Type: Grant
    Filed: December 28, 2013
    Date of Patent: July 4, 2017
    Assignee: Intel Corporation
    Inventors: Robert E. Gough, Mazen G. Gedeon, Barnes Cooper, Basavaraj B. Astekar, Sean C. Dardis
  • Publication number: 20170109174
    Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.
    Type: Application
    Filed: December 30, 2016
    Publication date: April 20, 2017
    Applicant: INTEL CORPORATION
    Inventors: Nathaniel L. DESIMONE, Robert E. GOUGH, Sean C. DARDIS
  • Patent number: 9552316
    Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 29, 2014
    Date of Patent: January 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Nathaniel L. Desimone, Robert E. Gough, Sean C. Dardis
  • Publication number: 20150277935
    Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.
    Type: Application
    Filed: March 29, 2014
    Publication date: October 1, 2015
    Inventors: NATHANIEL L. DESIMONE, ROBERT E. GOUGH, SEAN C. DARDIS
  • Publication number: 20150185808
    Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.
    Type: Application
    Filed: December 28, 2013
    Publication date: July 2, 2015
    Inventors: Robert E. GOUGH, Mazen G. GEDEON, Barnes COOPER, Basavaraj B. ASTEKAR, Sean C. DARDIS