Abstract: Systems and methods can be employed to determine one or more timing characteristics of a circuit design. In one embodiment, a system includes a calculator that provides an indication of slack for at least one node of a circuit design, the at least one node being capable of operating transparently and non-transparently. The indication of slack is determined based on a minimum of slack for paths that include the at least one node, regardless of path transparency.

Abstract: A plurality of serially coupled circuit cells (12-20) are modeled as a distributed serial load. The distributed serial load provides an accurate load model in situations where one cell is effected by loading on subsequent circuit cells, i.e. downstream loading is conveyed back to the first cell. The capacitance (22) and resistance (24, of each cell has a loading effect on each previous cell. The effective resistance and capacitive values of each cell is identified and maintained as one element of the distributed serial load model. The distributed serial load accurately models the loading of unbuffered cells (16-20). The distributed serial load is also applicable to portions of circuit cells (38,40) that are not be buffered and where the downstream loading has an effect on previous circuit drivers (14).

Abstract: A method (10) for generating a table (26', 26") having independent (C.sub.L, e.sub.r) and dependent (P.sub.D) table model parameters is provided. An initial table (26) is generated by measuring actual values of the dependent table model parameters (P.sub.D) for corresponding independent table model parameters (C.sub.L, e.sub.r) and inserting the actual values into the initial table (26). Calculated table model parameters are generated by calculating values of the dependent table model parameters (P.sub.D) corresponding to independent table model parameters (C.sub.L, e.sub.r), wherein the corresponding independent table model parameters (C.sub.L, e.sub.r) are between the measured independent table model parameters (C.sub.L, e.sub.r). The calculated values are compared to measured values and if an error value exceeds a predetermined error tolerance level, the initial table (26) is updated by inserting the actual values of the dependent table model parameters (P.sub.

Abstract: A computer implemented method provides for simulation standard cells from an integrated circuit design in parallel on a distributed simulation system. The integrated circuit design (10) is divided into a plurality of standard cells (12-18). Characterization parameters such as temperature, process, supply voltage, edge rate and capacitive load are individually assigned (34) to each one of the standard cells. A first one (12) of the standard cells is scheduled (36) and dispatched (38) for simulation in a first computer workstation (22) on the distributed simulation system (20). A second one (14) of the standard cells is scheduled and dispatch for execution in a second computer workstation (24) on the distributed simulation system during the simulation of the first standard cell. The results of the first and second simulations are stored (40) upon completion of the respective simulation tasks.

Abstract: A method executed by a computer program performs cell characterization in a distributed simulation system by partitioning characterization tasks into individual simulations. A simulation job is generated based on the individual simulations and placed into a simulation job queue. The simulation job queue is copied into a database. The simulation job is accessed and processed in a remote simulator. The remote simulator returns a simulation status and simulation results which are placed into an acknowledge queue. The simulation process is repeated upon detecting an error condition from the simulation status. The simulation status is read from the acknowledge queue and the acknowledge queue is copied into the database.

Abstract: A method executed by a computer simulator measures energy dissipation in a cell having one or more outputs. A first series of simulations is performed with given cell parameters over a simulation period while varying capacitance on a first output of the cell for providing a first range of currents sunk by the cell. A second series of simulations provides a second range of currents by varying capacitance on a second output. The first and second ranges of currents are converted to first and second ranges of energy dissipations. The energy dissipation due to the charging rates is subtracted from energy dissipation due to the switching for providing a model of energy dissipation by the cell itself. A nominal point of the first range of energy dissipation may be subtracted from each point of the second range of energy dissipation for providing an offset range of energy dissipations.

Abstract: A low power flip-flop circuit is disclosed including a clocked flip-flop (10) and switching circuit (40, 60) with control inputs coupled to the data input and data output of the flip-flop to determine whether or not the data input to the flip-flop is changing. Any clock pulse during periods when the data input is not changing consumes power without providing a useful function. The switching circuit passes clock pulses to a clock input of the flip-flop only when new data is present to be latched into the flip-flop, i.e. data input state and data output state disagree. The switching circuit blocks clock pulses to the flip-flop when the data to the flip-flop is not changing and thereby saves power consumption.