Patents by Inventor Sean Dardis

Sean Dardis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11842202
    Abstract: An apparatus and method are provided which take advantage of heterogeneous compute capability to dynamically pick the best operating core for BIOS power-up flows and sleep exit flows (e.g., S3, S4, and/or S5). The selection of the BSP is moved to an early power-up time instead of a fixed hardware selection at any time. For maximum boot performance, the system selects the fastest capable core as the BSP at an early power-up time. In addition, for maximum power saving, the system selects the most power efficient core as the BSP. Processor or switching for selecting the BSP happens during the boot-up as well as power-up flows (e.g., S3, S4, and/or S5 flows).
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: December 12, 2023
    Assignee: Intel Corporation
    Inventors: Pannerkumar Rajagopal, Karunakara Kotary, Sean Dardis
  • Patent number: 11556327
    Abstract: Systems, apparatuses and methods may provide for technology that assumes, by a root of trust located in a trusted region of a system on chip (SOC), control over a reset of the SOC and conducting, by the root of trust, an authentication of an update package in response to an update condition. The root of trust technology may also apply the update package to firmware located in non-volatile memory (NVM) associated with a microcontroller of the SOC if the authentication is successful.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Karunakara Kotary, Michael Kubacki, Sean Dardis
  • Patent number: 11550592
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to utilize non-volatile memory for computer system boot. An example processor platform includes a non-volatile memory coupled to a processing unit via a bus, and a microcontroller to: configure the processing unit to store, on the non-volatile memory, a heap and a stack for execution of boot code, and configure the processing unit to execute the boot code stored on the non-volatile memory.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 10, 2023
    Assignee: Intel Corporation
    Inventors: Karunakara Kotary, Sean Dardis, Michael Kubacki, Ankit Sinha
  • Patent number: 11422896
    Abstract: Systems, apparatuses and methods may provide for technology that conducts a first copy of firmware data from a first partition in a storage device to a second partition in the storage device, detects a recovery condition with respect to the firmware data in the first partition, and automatically conducts a second copy of the firmware data from the second partition to the first partition in response to the recovery condition. In one example, the firmware data defines one or more settings for firmware code.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Karunakara Kotary, Sean Dardis, Michael Kubacki
  • Patent number: 11288124
    Abstract: Methods, apparatus, systems and articles of manufacture for mitigating a firmware failure are disclosed. An example apparatus includes at least one hardware processor and first memory including instructions to be executed by the at least one hardware processor. The example apparatus further includes mask memory including a feature mask associated with a first firmware version, the feature mask identifying features of the first firmware version to be disabled. A platform firmware controller is to apply the first firmware version to the first memory for execution by the at least one processor, initialize the at least one processor using the feature mask, and in response to a detection of a failure, determine a first de-feature mask based on a second de-feature mask previously used by the at least one processor and the feature update mask; and initialize the processor using the first de-feature mask.
    Type: Grant
    Filed: March 30, 2019
    Date of Patent: March 29, 2022
    Assignee: Intel corporation
    Inventors: Sean Dardis, Karunakara Kotary, Michael Kubacki, Ankit Sinha
  • Publication number: 20210124594
    Abstract: An apparatus and method are provided which take advantage of heterogeneous compute capability to dynamically pick the best operating core for BIOS power-up flows and sleep exit flows (e.g., S3, S4, and/or S5). The selection of the BSP is moved to an early power-up time instead of a fixed hardware selection at any time. For maximum boot performance, the system selects the fastest capable core as the BSP at an early power-up time. In addition, for maximum power saving, the system selects the most power efficient core as the BSP. Processor or switching for selecting the BSP happens during the boot-up as well as power-up flows (e.g., S3, S4, and/or S5 flows).
    Type: Application
    Filed: October 16, 2020
    Publication date: April 29, 2021
    Applicant: Intel Corporation
    Inventors: Pannerkumar Rajagopal, Karunakara Kotary, Sean Dardis
  • Publication number: 20210096840
    Abstract: Systems, apparatuses and methods may provide for technology that assumes, by a root of trust located in a trusted region of a system on chip (SOC), control over a reset of the SOC and conducting, by the root of trust, an authentication of an update package in response to an update condition. The root of trust technology may also apply the update package to firmware located in non-volatile memory (NVM) associated with a microcontroller of the SOC if the authentication is successful.
    Type: Application
    Filed: August 10, 2020
    Publication date: April 1, 2021
    Inventors: Karunakara Kotary, Michael Kubacki, Sean Dardis
  • Patent number: 10740084
    Abstract: Systems, apparatuses and methods may provide for technology that assumes, by a root of trust located in a trusted region of a system on chip (SOC), control over a reset of the SOC and conducting, by the root of trust, an authentication of an update package in response to an update condition. The root of trust technology may also apply the update package to firmware located in non-volatile memory (NVM) associated with a microcontroller of the SOC if the authentication is successful.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: August 11, 2020
    Assignee: Intel Corporation
    Inventors: Karunakara Kotary, Michael Kubacki, Sean Dardis
  • Publication number: 20200226028
    Abstract: Systems, apparatuses and methods may provide for technology that conducts a first copy of firmware data from a first partition in a storage device to a second partition in the storage device, detects a recovery condition with respect to the firmware data in the first partition, and automatically conducts a second copy of the firmware data from the second partition to the first partition in response to the recovery condition. In one example, the firmware data defines one or more settings for firmware code.
    Type: Application
    Filed: March 27, 2020
    Publication date: July 16, 2020
    Inventors: Karunakara Kotary, Sean Dardis, Michael Kubacki
  • Publication number: 20190227876
    Abstract: Methods, apparatus, systems and articles of manufacture for mitigating a firmware failure are disclosed. An example apparatus includes at least one hardware processor and first memory including instructions to be executed by the at least one hardware processor. The example apparatus further includes mask memory including a feature mask associated with a first firmware version, the feature mask identifying features of the first firmware version to be disabled. A platform firmware controller is to apply the first firmware version to the first memory for execution by the at least one processor, initialize the at least one processor using the feature mask, and in response to a detection of a failure, determine a first de-feature mask based on a second de-feature mask previously used by the at least one processor and the feature update mask; and initialize the processor using the first de-feature mask.
    Type: Application
    Filed: March 30, 2019
    Publication date: July 25, 2019
    Inventors: Sean Dardis, Karunakara Kotary, Michael Kubacki, Ankit Sinha
  • Publication number: 20190042229
    Abstract: Systems, apparatuses and methods may provide for technology that assumes, by a root of trust located in a trusted region of a system on chip (SOC), control over a reset of the SOC and conducting, by the root of trust, an authentication of an update package in response to an update condition. The root of trust technology may also apply the update package to firmware located in non-volatile memory (NVM) associated with a microcontroller of the SOC if the authentication is successful.
    Type: Application
    Filed: August 16, 2018
    Publication date: February 7, 2019
    Inventors: Karunakara Kotary, Michael Kubacki, Sean Dardis
  • Publication number: 20190042272
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to utilize non-volatile memory for computer system boot. An example processor platform includes a non-volatile memory coupled to a processing unit via a bus, and a microcontroller to: configure the processing unit to store, on the non-volatile memory, a heap and a stack for execution of boot code, and configure the processing unit to execute the boot code stored on the non-volatile memory.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: Karunakara Kotary, Sean Dardis, Michael Kubacki, Ankit Sinha