Patents by Inventor Sean E. Nerich

Sean E. Nerich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Active input/output expander of a memory sub-system
    Patent number: 11675696
    Abstract: A value setting associated with one or more parameters of a host-side interface and a memory-side interface of an input/output (I/O) expander is configured to enable Open NAND Flash Interface (ONFI)-compliant communications between a host system and a target memory die of a memory sub-system. The I/O expander processes one or more ONFI-compliant communications between the host system and the target memory die, wherein the one or more ONFI-compliant communications relate to execution of a memory access operation.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: June 13, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Suresh Rajgopal, Jeremy W. Butterfield, Sean E. Nerich, Dustin J. Carter
  • ACTIVE INPUT/OUTPUT EXPANDER OF A MEMORY SUB-SYSTEM
    Publication number: 20210406172
    Abstract: A value setting associated with one or more parameters of a host-side interface and a memory-side interface of an input/output (I/O) expander is configured to enable Open NAND Flash Interface (ONFI)-compliant communications between a host system and a target memory die of a memory sub-system. The I/O expander processes one or more ONFI-compliant communications between the host system and the target memory die, wherein the one or more ONFI-compliant communications relate to execution of a memory access operation.
    Type: Application
    Filed: September 14, 2021
    Publication date: December 30, 2021
    Inventors: Suresh Rajgopal, Jeremy W. Butterfield, Sean E. Nerich, Dustin J. Carter
  • Active input/output expander of a memory sub-system
    Patent number: 11132292
    Abstract: A read command to read a target memory die of a memory sub-system is received from a host system via a host-side interface of an active input/output (I/O) expander. The active I/O expander identifies a page address corresponding to the target memory die and decodes the read command to send to a memory stack associated with the page address corresponding to the target memory die. Read data is received via a memory-side interface of the active I/O expander from the memory stack including the target memory die. A signal conditioning operation is performed on the read data to generate conditioned read data. The active I/O expander sends, via the host-side interface, the conditioned read data to the host system.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Suresh Rajgopal, Jeremy W. Butterfield, Sean E. Nerich, Dustin J. Carter
  • ACTIVE INPUT/OUTPUT EXPANDER OF A MEMORY SUB-SYSTEM
    Publication number: 20210173771
    Abstract: A read command to read a target memory die of a memory sub-system is received from a host system via a host-side interface of an active input/output (I/O) expander. The active I/O expander identifies a page address corresponding to the target memory die and decodes the read command to send to a memory stack associated with the page address corresponding to the target memory die. Read data is received via a memory-side interface of the active I/O expander from the memory stack including the target memory die. A signal conditioning operation is performed on the read data to generate conditioned read data. The active I/O expander sends, via the host-side interface, the conditioned read data to the host system.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 10, 2021
    Inventors: Suresh Rajgopal, Jeremy W. Butterfield, Sean E. Nerich, Dustin J. Carter