Patents by Inventor Sean Ellis
Sean Ellis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10825128Abstract: A data processing system comprises processing circuitry arranged to generate data to form an output array of data, processing circuitry arranged to store the generated data in an output buffer 15 by writing compressed blocks of data representing particular regions of the output array of data to the output buffer, processing circuitry 14 arranged to read a compressed block of data representing a particular region of the array of data from the output buffer, processing circuitry 16 arranged to acquire meta-data from the compressed block of data, and processing circuitry 21 arranged to process the block of data. The acquired meta-data is used to affect the processing of the block of data.Type: GrantFiled: August 10, 2015Date of Patent: November 3, 2020Assignee: Arm LimitedInventors: Daren Croxford, Ben James, Sean Ellis, Edward Charles Plowman
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Patent number: 10235792Abstract: A tile based graphics processing pipeline comprises a plurality of processing stages, including at least a rasterizer that rasterizes input primitives to generate graphics fragments to be processed, and a renderer that processes fragments generated by the rasterizer to generate rendered fragment data, and a processing stage 6 operable to receive rendered fragment data 3, and to perform a processing operation using the rendered fragment data to generate per-tile metadata 7.Type: GrantFiled: April 29, 2015Date of Patent: March 19, 2019Assignee: Arm LimitedInventors: Alexis Mather, Sean Ellis
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Patent number: 10194156Abstract: A method and an apparatus are provided for generating an output frame from an input frame, in which the input frame is processed when generating the output frame. A region of a current input frame is compared with a region of a preceding input frame to determine if the region of the current input frame is similar to the region of the preceding input frame. When the region of the current input frame is determined to be similar to the region of the preceding input frame, information relating to processing performed on the region of the preceding input frame when generating a region of a preceding output frame is read, wherein the information is generated during the processing on the region of the preceding input frame. When the information indicates that the processing is unnecessary, a part or all of the processing of the region of the current input frame can be bypassed or eliminated.Type: GrantFiled: July 8, 2015Date of Patent: January 29, 2019Assignee: ARM LimitedInventors: Daren Croxford, Sean Ellis, Ben James
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Patent number: 10089782Abstract: When rendering a region of a three-dimensional object represented by a base set of polygon vertices in a graphics processing pipeline, a first processing stage uses meta-information representative of the surface relief of the region of the three-dimensional object to determine whether to generate a set of additional polygon vertices over the region of the three-dimensional object, and generates the additional set of polygon vertices (when this is deemed necessary). A second processing stage then uses information representative of the surface relief of the region of the three-dimensional object to modify the positions of one or more of the polygon vertices, before the vertices are assembled into primitives that are then rasterised and rendered.Type: GrantFiled: May 20, 2015Date of Patent: October 2, 2018Assignee: Arm LimitedInventors: Edward Plowman, Sean Ellis
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Patent number: 9458770Abstract: Apparatus for controlling a turbine aircraft engine may include apparatus to determine an amount of secondary power extraction from the engine, a secondary load processor configured to receive and condition secondary power extraction data. An electronic engine controller (EEC) may be configured to receive secondary load data from the secondary load processor and produce commands to open bleed-air valves of the engine, said commands being based on the secondary load data.Type: GrantFiled: April 1, 2014Date of Patent: October 4, 2016Assignee: HONEYWELL INTERNATIONAL INC.Inventors: Cristian Anghel, Wayne Pearson, Sean Ellis, Glenn A. Knight
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Publication number: 20160207639Abstract: A computerised aircraft engine maintenance planning system for maintaining an aircraft engine fleet comprising a plurality of aircraft engines, each engine in the fleet comprising an engine health monitoring system configured to provide data indicative of an incipient fault for a respective engine. The planning system comprises: a fault forwarding sub-system configured to receive indications of incipient faults from respective engine health monitoring systems, the fault forwarding system being configured to identify two or more engines having linked incipient faults; and a queuing sub-system configured to assign each engine identified as having an incipient fault to a virtual maintenance queue position; wherein the queuing sub-system is configured to group engines having linked incipient faults to adjacent queue positions.Type: ApplicationFiled: December 9, 2015Publication date: July 21, 2016Inventors: Sean ELLIS, Parag VYAS, Richardson NNAEKEZIE, Matthew MOXON, Ekin INCELEME
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Publication number: 20160042491Abstract: A data processing system comprises processing circuitry arranged to generate data to form an output array of data, processing circuitry arranged to store the generated data in an output buffer 15 by writing compressed blocks of data representing particular regions of the output array of data to the output buffer, processing circuitry 14 arranged to read a compressed block of data representing a particular region of the array of data from the output buffer, processing circuitry 16 arranged to acquire meta-data from the compressed block of data, and processing circuitry 21 arranged to process the block of data. The acquired meta-data is used to affect the processing of the block of data.Type: ApplicationFiled: August 10, 2015Publication date: February 11, 2016Applicant: ARM LimitedInventors: Daren Croxford, Ben James, Sean Ellis, Edward Charles Plowman
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Publication number: 20160021384Abstract: A method and an apparatus are provided for generating an output frame from an input frame, in which the input frame is processed when generating the output frame. A region of a current input frame is compared with a region of a preceding input frame to determine if the region of the current input frame is similar to the region of the preceding input frame. When the region of the current input frame is determined to be similar to the region of the preceding input frame, information relating to processing performed on the region of the preceding input frame when generating a region of a preceding output frame is read, wherein the information is generated during the processing on the region of the preceding input frame. When the information indicates that the processing is unnecessary, a part or all of the processing of the region of the current input frame can be bypassed or eliminated.Type: ApplicationFiled: July 8, 2015Publication date: January 21, 2016Inventors: Daren CROXFORD, Sean ELLIS, Ben JAMES
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Publication number: 20150339852Abstract: When rendering a region of a three-dimensional object represented by a base set of polygon vertices in a graphics processing pipeline, a first processing stage uses meta-information representative of the surface relief of the region of the three-dimensional object to determine whether to generate a set of additional polygon vertices over the region of the three-dimensional object, and generates the additional set of polygon vertices (when this is deemed necessary). A second processing stage then uses information representative of the surface relief of the region of the three-dimensional object to modify the positions of one or more of the polygon vertices, before the vertices are assembled into primitives that are then rasterised and rendered.Type: ApplicationFiled: May 20, 2015Publication date: November 26, 2015Applicant: ARM LimitedInventors: Edward Plowman, Sean Ellis
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Publication number: 20150317763Abstract: A tile based graphics processing pipeline comprises a plurality of processing stages, including at least a rasteriser that rasterises input primitives to generate graphics fragments to be processed, and a renderer that processes fragments generated by the rasteriser to generate rendered fragment data, and a processing stage 6 operable to receive rendered fragment data 3, and to perform a processing operation using the rendered fragment data to generate per-tile metadata 7.Type: ApplicationFiled: April 29, 2015Publication date: November 5, 2015Applicant: ARM LIMITEDInventors: Alexis Mather, Sean Ellis
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Publication number: 20150275768Abstract: Apparatus for controlling a turbine aircraft engine may include apparatus to determine an amount of secondary power extraction from the engine, a secondary load processor configured to receive and condition secondary power extraction data. An electronic engine controller (EEC) may be configured to receive secondary load data from the secondary load processor and produce commands to open bleed-air valves of the engine, said commands being based on the secondary load data.Type: ApplicationFiled: April 1, 2014Publication date: October 1, 2015Applicant: HONEYWELL INTERNATIONAL INC.Inventors: CRISTIAN ANGHEL, WAYNE PEARSON, SEAN ELLIS, GLENN A. KNIGHT
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Patent number: 9122646Abstract: In a tile-based graphics processing system having plural rendering processors, the set of tiles 31 to be processed to generate an output frame 30 for display is partitioned among the different rendering processors by defining respective tile traversal paths 32, 33, 34, 35 for each rendering processor that start at a tile initially allocated to the processor and that, at least for the initial tiles along the path, traverse to spatially adjacent tiles in the output, and that will traverse every tile to be rendered if followed to their end. The next tile for a given rendering processor to process is then selected as being the next tile along its defined path, unless the next tile in the path has already been processed (or is already being processed) by another rendering processor, in which case the next tile to be allocated to the rendering processor is selected to be a free tile further on in the tile traversal path for that processor.Type: GrantFiled: September 20, 2012Date of Patent: September 1, 2015Assignee: ARM LIMITEDInventors: Sean Ellis, Andreas Engh-halstvedt, Jorn Nystad
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Patent number: 8698820Abstract: In a graphics processing system, a command list reader first reads-in and identifies a portion of a command list. The primitives corresponding to the commands in the portion of the command list are then subjected to a Z-only processing pass. This allows a Z-buffer 16 and a hierarchical Z-pyramid 8 to be filled with the appropriate Z-values for the primitives in the portion of the primitive list. The primitives are then subjected to a second, normal rendering, processing pass, but the filled Z-buffer 16 and Z-pyramid from the first processing pass are used together with the Z-tests 7, 10 performed in the second processing pass to determine which primitive should be processed for each sampling point in the second processing pass.Type: GrantFiled: June 5, 2009Date of Patent: April 15, 2014Assignee: ARM LimitedInventors: Andrew Helge Cox, Robert Elliot, Robin Fell, Sean Ellis
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Publication number: 20110276966Abstract: A processing apparatus includes task manager circuitry 14 issuing task specifiers to processing circuitry 16, 18, 20, 22, 24 indicating processing tasks to be performed. The task specifier includes a relaxed dependency identifier to which the processing circuitry is responsive. The processing circuitry responds to the relaxed dependency identifier by starting the processing task concerned and then controlling the processing task concerned in dependency upon the status of the other processing task upon which there is a relaxed dependency. The task specifier may also indicate a strict dependency in which a processing task may not be started until the other processing task has completed as well as a no dependency indication in which the processing task may be started without reference to any other processing task.Type: ApplicationFiled: May 6, 2010Publication date: November 10, 2011Applicant: ARM LIMITEDInventors: Aske Simon Christensen, Sean Ellis, Andreas Engh-Halstvedt
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Publication number: 20100007662Abstract: In a graphics processing system, a command list reader 3 first reads-in and identifies a portion of a command list. The primitives corresponding to the commands in the portion of the command list are then subjected to a Z-only processing pass. This allows a Z-buffer 16 and a hierarchical Z-pyramid 8 to be filled with the appropriate Z-values for the primitives in the portion of the primitive list. The primitives are then subjected to a second, normal rendering, processing pass, but the filled Z-buffer 16 and Z-pyramid 8 from the first processing pass are used together with the Z-tests 7, 10 performed in the second processing pass to determine which primitive should be processed for each sampling point in the second processing pass.Type: ApplicationFiled: June 5, 2009Publication date: January 14, 2010Applicant: ARM LimitedInventors: Andrew Helge Cox, Robert Elliot, Robin Fell, Sean Ellis