Abstract: A method for manufacturing a passivation stack on a crystalline silicon solar cell device. The method includes providing a substrate comprising a crystalline silicone layer such as a crystalline silicon wafer or chip, cleaning a surface of the crystalline silicon layer by removing an oxide layer at least from a portion of one side of the crystalline silicon layer, depositing, on at least a part of the cleaned surface, a layer of silicon oxynitride, and depositing a capping layer comprising a hydrogenated dielectric material on top of the layer of silicon oxynitride, wherein the layer of silicon oxynitride is deposited at a temperature from 100° C. to 200° C., and the step of depositing the layer of silicon oxynitride includes using N2O and SiH4 as precursor gasses in an N2 ambient atmosphere and depositing silicon oxynitride with a gas flow ratio of N2O to SiH4 below 2.

Abstract: A method for manufacturing a passivation stack on a crystalline silicon solar cell device. The method includes providing a substrate comprising a crystalline silicone layer such as a crystalline silicon wafer or chip, cleaning a surface of the crystalline silicon layer by removing an oxide layer at least from a portion of one side of the crystalline silicon layer, depositing, on at least a part of the cleaned surface, a layer of silicon oxynitride, and depositing a capping layer comprising a hydrogenated dielectric material on top of the layer of silicon oxynitride, wherein the layer of silicon oxynitride is deposited at a temperature from 100° C. to 200° C., and the step of depositing the layer of silicon oxynitride includes using N2O and SiH4 as precursor gasses in an N2 ambient atmosphere and depositing silicon oxynitride with a gas flow ratio of N2O to SiH4 below 2.

Abstract: A method for manufacturing a passivation stack on a crystalline silicon solar cell device. The method includes providing a substrate comprising a crystalline silicone layer such as a crystalline silicon wafer or chip, cleaning a surface of the crystalline silicon layer by removing an oxide layer at least from a portion of one side of the crystalline silicon layer, depositing, on at least a part of the cleaned surface, a layer of silicon oxynitride, and depositing a capping layer comprising a hydrogenated dielectric material on top of the layer of silicon oxynitride, wherein the layer of silicon oxynitride is deposited at a temperature from 100° C. to 200° C., and the step of depositing the layer of silicon oxynitride includes using N2O and SiH4 as precursor gasses in an N2 ambient atmosphere and depositing silicon oxynitride with a gas flow ratio of N2O to SiH4 below 2.

Abstract: A method for manufacturing a passivation stack on a crystalline silicon solar cell device. The method includes providing a substrate comprising a crystalline silicone layer such as a crystalline silicon wafer or chip, cleaning a surface of the crystalline silicon layer by removing an oxide layer at least from a portion of one side of the crystalline silicon layer, depositing, on at least a part of the cleaned surface, a layer of silicon oxynitride, and depositing a capping layer comprising a hydrogenated dielectric material on top of the layer of silicon oxynitride, wherein the layer of silicon oxynitride is deposited at a temperature from 100° C. to 200° C., and the step of depositing the layer of silicon oxynitride includes using N20 and SiH4 as precursor gasses in an N2 ambient atmosphere and depositing silicon oxynitride with a gas flow ratio of N20 to SiH4 below 2.

Abstract: A device including a surface layer of a selected material in a predetermined pattern on a substrate surface. A groove or ridge arranged in the substrate surface includes a bottom or top face, respectively, and at least one side face sloping relative to the bottom or top face. The surface layer is deposited on a part of the substrate including the groove or ridge by vacuum chamber sputtering the selected material from a sputtering source while moving the substrate past the sputtering source in a direction substantially perpendicular to a sputtering main lobe direction and with a normal to the substrate surface substantially in a predefined angle with the main lobe direction. By uniformly etching away surface layer material deposited on the substrate by the sputtering until freeing a substantial part of the side face, the predetermined pattern becomes defined substantially by the bottom face or the top face.

Abstract: A device including a surface layer of a selected material in a predetermined pattern on a substrate surface. A groove or ridge arranged in the substrate surface includes a bottom or top face, respectively, and at least one side face sloping relative to the bottom or top face. The surface layer is deposited on a part of the substrate including the groove or ridge by vacuum chamber sputtering the selected material from a sputtering source whilst moving the substrate past the sputtering source in a direction substantially perpendicular to a sputtering main lobe direction and with a normal to the substrate surface substantially in a predefined angle with the main lobe direction. By uniformly etching away surface layer material deposited on the substrate by the sputtering until freeing a substantial part of the side face, the predetermined pattern becomes defined substantially by the bottom face or the top face.

Abstract: A method for forming a solar cell and a solar cell having a top electrode with a finger pattern. The finger pattern is formed of a structure of aligned particles that is formed by applying a thin film comprising a fluid matrix with conductive particles on to the solar cell surface, aligning the conductive particles into electrically conductive wires by applying an electric field over the thin film and curing the matrix.

Abstract: A silicon crystal wafer or chip, and a method for processing a substantially pure or semiconductor level doped silicon crystal wafer or chip for adapting the wafer or chip for laser beam ablation of an electrically insulating surface layer carried on the wafer or chip. A layer of amorphous silicon of a thickness substantially larger than the thickness of the naturally obtained oxide layer, the amorphous silicon being a substantially pure or semiconductor level doped grade amorphous silicon, is produced on top of a substantially clean surface of the silicon crystal wafer or chip. A layer of the electrically insulating surface layer being substantially transparent to an optical wavelength of a laser beam that is extensively absorbed in the layer of amorphous silicon, is produced on the layer of amorphous silicon.