Patents by Inventor Sean Horner

Sean Horner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for modeling integrated circuit yield
    Patent number: 7013441
    Abstract: A method and system for predicting manufacturing yield for a proposed integrated circuit The method includes: in the order recited: (a) providing a multiplicity of different integrated circuit library elements in a design database, each library element linked to a corresponding normalization factor in the design database; (b) selecting library elements from the design database to include in a proposed design for the integrated circuit; (c) generating an equivalent circuit count of the proposed design based on the normalization factors and a count of each different library element included in the proposed design; and (d) calculating a predicted manufacturing yield based on the equivalent circuit count, a predicted density of manufacturing defects and an area of the proposed integrated circuit chip.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: March 14, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jeanne P. Bickford, Edward K. Evans, Sean Horner, Raymond J. Rosner, Andrew Wienick, Joseph Yoder
  • METHOD FOR MODELING INTEGRATED CIRCUIT YIELD
    Publication number: 20050071788
    Abstract: A method and system for predicting manufacturing yield for a proposed integrated circuit The method includes: in the order recited: (a) providing a multiplicity of different integrated circuit library elements in a design database, each library element linked to a corresponding normalization factor in the design database; (b) selecting library elements from the design database to include in a proposed design for the integrated circuit; (c) generating an equivalent circuit count of the proposed design based on the normalization factors and a count of each different library element included in the proposed design; and (d) calculating a predicted manufacturing yield based on the equivalent circuit count, a predicted density of manufacturing defects and an area of the proposed integrated circuit chip.
    Type: Application
    Filed: September 26, 2003
    Publication date: March 31, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeanne Bickford, Edward Evans, Sean Horner, Raymond Rosner, Andrew Wienick, Joseph Yoder