Patents by Inventor Sean Lord
Sean Lord has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11727869Abstract: An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.Type: GrantFiled: January 11, 2021Date of Patent: August 15, 2023Assignee: Meta Platforms Technologies, LLCInventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Publication number: 20230144565Abstract: A circuitry (30) for on-chip power regulation is provided. The circuitry (30) comprises a memory array (31) comprising a plurality of memory cell blocks (32) arranged in rows and columns, where the memory cell blocks are clustered into a defined number of memory cell blocks (33) along the row, each cluster (33) is connected to a respective local reference line (34). In addition, the circuitry (30) comprises a plurality of sense amplifiers (40) connected to the respective memory cell blocks (32). The circuitry (30) further comprises at least one dummy memory cell block (35) additionally arranged to each cluster of memory cell blocks (33), where the dummy memory cell block (35) is connected to a main reference line (36). Moreover, the circuitry (30) comprises at least one transistor (37) arranged in between the local reference line (34) of each cluster of memory cell blocks (33) and the main reference line (36).Type: ApplicationFiled: March 25, 2021Publication date: May 11, 2023Inventors: Soeren STEUDEL, Sean LORD
-
Publication number: 20220076610Abstract: A display comprises a matrix comprising a plurality of N rows divided into a plurality of M columns of cells, each cell including a light emitting device; a scan driver providing a plurality of N scan line signals to respective rows of said matrix, each for selecting a respective row of the matrix to be programmed with pixel values; and a data driver providing a plurality of M variable level data signals to respective columns of the matrix, each for programming a respective pixel within a selected row of the matrix with a pixel value. A pulse driver provides a plurality of N driving signals to respective rows of the matrix, each driving signal comprising successive sequences of pulses enabling the cells to emit light according to their programmed pixel values during respective sub-frames of successive frames to be displayed.Type: ApplicationFiled: November 15, 2021Publication date: March 10, 2022Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li, Alexander Victor Henzen
-
Patent number: 11200831Abstract: A display comprises a matrix comprising a plurality of N rows divided into a plurality of M columns of cells, each cell including a light emitting device; a scan driver providing a plurality of N scan line signals to respective rows of said matrix, each for selecting a respective row of the matrix to be programmed with pixel values; and a data driver providing a plurality of M variable level data signals to respective columns of the matrix, each for programming a respective pixel within a selected row of the matrix with a pixel value. A pulse driver provides a plurality of N driving signals to respective rows of the matrix, each driving signal comprising successive sequences of pulses enabling the cells to emit light according to their programmed pixel values during respective sub-frames of successive frames to be displayed.Type: GrantFiled: March 14, 2017Date of Patent: December 14, 2021Assignee: Facebook Technologies, LLCInventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li, Alexander Victor Henzen
-
Publication number: 20210134220Abstract: An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.Type: ApplicationFiled: January 11, 2021Publication date: May 6, 2021Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Patent number: 10916192Abstract: An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.Type: GrantFiled: September 26, 2018Date of Patent: February 9, 2021Assignee: Facebook Technologies, LLCInventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Patent number: 10679911Abstract: Described herein are ILED displays including redundancy in micro-light emitting diode (micro-LED) dies and methods of manufacturing the ILED displays. A micro-LED die emits light of a particular wavelength. The redundancy is added during manufacturing if defective micro-LED dies are identified. Additional micro-LED dies are included in inoperable sub-pixel assemblies to repair the inoperable sub-pixel assemblies that are identified to include defective micro-LED dies. An ILED display therefore includes at least one repaired sub-pixel assembly that includes two defective micro-LED dies and an operable micro-LED die that are coupled to separate branches of a current path from a current source.Type: GrantFiled: December 27, 2017Date of Patent: June 9, 2020Assignee: Facebook Technologies, LLCInventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Publication number: 20190181060Abstract: Described herein are ILED displays including redundancy in micro-light emitting diode (micro-LED) dies and methods of manufacturing the ILED displays. A micro-LED die emits light of a particular wavelength. The redundancy is added during manufacturing if defective micro-LED dies are identified. Additional micro-LED dies are included in inoperable sub-pixel assemblies to repair the inoperable sub-pixel assemblies that are identified to include defective micro-LED dies. An ILED display therefore includes at least one repaired sub-pixel assembly that includes two defective micro-LED dies and an operable micro-LED die that are coupled to separate branches of a current path from a current source.Type: ApplicationFiled: December 27, 2017Publication date: June 13, 2019Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Patent number: 10283053Abstract: An active matrix display wherein each cell comprises: two thin-film transistors (TFTs) connected in series, the first TFT having its drain connected to a high supply line and the second TFT having its source connected to a low supply line. Gates of the first and second TFTs are selectively connected to respective first and second data driver signals under the control of a scan line signal. A storage capacitance is connected to a node joining the first and second TFT. A driving TFT has a gate connected to the joining node and is connected to drive a light emitting device with a bias current. In one embodiment, the first and second TFTs are sized relative to one another and the first and second data driver signal voltages are related proportionally, so that the data driver signals and the bias current are related to one another by a function substantially independent of a threshold voltage of the driving TFT.Type: GrantFiled: April 5, 2017Date of Patent: May 7, 2019Assignee: Facebook Technologies, LLCInventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Publication number: 20190027094Abstract: An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.Type: ApplicationFiled: September 26, 2018Publication date: January 24, 2019Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Patent number: 10157573Abstract: An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.Type: GrantFiled: April 26, 2017Date of Patent: December 18, 2018Assignee: Facebook Technologies, LLCInventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Publication number: 20170309224Abstract: An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.Type: ApplicationFiled: April 26, 2017Publication date: October 26, 2017Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Publication number: 20170301296Abstract: An active matrix display wherein each cell comprises: two thin-film transistors (TFTs) connected in series, the first TFT having its drain connected to a high supply line and the second TFT having its source connected to a low supply line. Gates of the first and second TFTs are selectively connected to respective first and second data driver signals under the control of a scan line signal. A storage capacitance is connected to a node joining the first and second TFT. A driving TFT has a gate connected to the joining node and is connected to drive a light emitting device with a bias current. In one embodiment, the first and second TFTs are sized relative to one another and the first and second data driver signal voltages are related proportionally, so that the data driver signals and the bias current are related to one another by a function substantially independent of a threshold voltage of the driving TFT.Type: ApplicationFiled: April 5, 2017Publication date: October 19, 2017Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li
-
Publication number: 20170270850Abstract: A display comprises a matrix comprising a plurality of N rows divided into a plurality of M columns of cells, each cell including a light emitting device; a scan driver providing a plurality of N scan line signals to respective rows of said matrix, each for selecting a respective row of the matrix to be programmed with pixel values; and a data driver providing a plurality of M variable level data signals to respective columns of the matrix, each for programming a respective pixel within a selected row of the matrix with a pixel value. A pulse driver provides a plurality of N driving signals to respective rows of the matrix, each driving signal comprising successive sequences of pulses enabling the cells to emit light according to their programmed pixel values during respective sub-frames of successive frames to be displayed.Type: ApplicationFiled: March 14, 2017Publication date: September 21, 2017Inventors: Ilias Pappas, Sean Lord, Yu-Hsuan Li, Alex Victor Henzen
-
Publication number: 20170092183Abstract: This disclosure provides systems, methods and apparatus for controlling the states of a light modulator used in displays. A display apparatus includes pixels circuit for controlling the state of operation of dual actuator light modulators. The pixel circuit can be implemented using three transistors and a capacitor. In particular, the pixel circuit can include a charge-discharge transistor, a data transistor, and a feedback transistor. The charge-discharge transistor is used to both selectively charge and selectively discharge an output node of the pixel circuit coupled to the light modulator. The data transistor enables loading a data capacitor with data voltage representative of image data. The feedback transistor provides positive feedback to allow the output node to be charged to the actuation voltage via the charge-discharge transistor.Type: ApplicationFiled: September 24, 2015Publication date: March 30, 2017Inventors: Ilias Pappas, Yu-Hsuan Li, Sean Lord
-
Patent number: 7502245Abstract: A Content Addressable Memory array includes a plurality of coupled sub-blocks arranged in rows and columns. Search data received by a first sub-block in a first column of the CAM is propagated to each sub-block in the row to the last sub-block in the last column of the CAM. The search result for the CAM is selected based on the propagated search results for each row of sub-blocks and output on a side of the array opposite from the side receiving the search data.Type: GrantFiled: April 17, 2007Date of Patent: March 10, 2009Assignee: MOSAID Technologies, Inc.Inventors: Robert N. McKenzie, Dieter Haerle, Sean Lord
-
Patent number: 7334093Abstract: A priority encoder (PE) for a CAM, comprising a plurality of PE blocks, each receiving a plurality of match results corresponding to data entries in a corresponding data array block and, for determining an address of a highest priority data entry based on a physical location in the data array block during a CAM search-and-compare operation a register for storing a user defined priority value assigned to each PE block and means for evaluating priority values and the address determined by the plurality of PE blocks to select a PE block having the highest priority data entry.Type: GrantFiled: February 12, 2007Date of Patent: February 19, 2008Assignee: MOSAID Technologies IncorporatedInventors: Alan Roth, Sean Lord, Robert Mckenzie, Dieter Haerle, Steven Smith
-
Publication number: 20080025059Abstract: A Content Addressable Memory array includes a plurality of coupled sub-blocks arranged in rows and columns. Search data received by a first sub-block in a first column of the CAM is propagated to each sub-block in the row to the last sub-block in the last column of the CAM. The search result for the CAM is selected based on the propagated search results for each row of sub-blocks and output on a side of the array opposite from the side receiving the search data.Type: ApplicationFiled: April 17, 2007Publication date: January 31, 2008Inventors: Robert McKenzie, Dieter Haerle, Sean Lord
-
Publication number: 20070136514Abstract: A priority encoder (PE) for a CAM, comprising a plurality of PE blocks, each receiving a plurality of match results corresponding to data entries in a corresponding data array block and, for determining an address of a highest priority data entry based on a physical location in the data array block during a CAM search-and-compare operation a register for storing a user defined priority value assigned to each PE block and means for evaluating priority values and the address determined by the plurality of PE blocks to select a PE block having the highest priority data entry.Type: ApplicationFiled: February 12, 2007Publication date: June 14, 2007Applicant: MOSAID TECHNOLOGIES INCORPORATEDInventors: Alan ROTH, Sean LORD, Robert MCKENZIE, Dieter HAERLE, Steven SMITH
-
Patent number: RE43552Abstract: A priority encoder (PE) for a CAM, comprising a plurality of PE blocks, each receiving a plurality of match results corresponding to data entries in a corresponding data array block and, for determining an address of a highest priority data entry based on a physical location in the data array block during a CAM search-and-compare operation a register for storing a user defined priority value assigned to each PE block and means for evaluating priority values and the address determined by the plurality of PE blocks to select a PE block having the highest priority data entry.Type: GrantFiled: February 19, 2010Date of Patent: July 24, 2012Assignee: Mosaid Technologies IncorporatedInventors: Alan Roth, Sean Lord, Robert McKenzie, Dieter Haerle, Steven Smith