Patents by Inventor Sean Michael O'Connor

Sean Michael O'Connor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11494661
    Abstract: Implementations include receiving two or more time-series data sequences representative of a target process executed within a physical environment, executing automated time-series process segmentation to provide a plurality of subsequence segments for each of the two or more time-series data sequences, each subsequence segment corresponding to a phase of the target process, processing the two or more subsequence segments using at least one time-series transformation to provide a feature data set for each subsequence segment, applying each feature data set to provide time-series models for anomaly detection and forecasting, respectively, each time-series model being provided as one of a recurrent neural network (RNN), a convolution neural network (CNN), and a generative adversarial network (GAN), determining anomaly scores based on the time-series models, and selectively providing an alert to one or more users, each alert indicating at least one anomaly and a respective probability.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 8, 2022
    Assignee: Accenture Global Solutions Limited
    Inventors: Tim Wu, Sean Michael O'Connor, Takuya Kudo
  • Publication number: 20220295791
    Abstract: The invention provides methods of using environmentally compatible detergents in the field of recombinant protein manufacturing for inactivating viruses in a product feedstream in the manufacturing process of proteins intended for administration to a patient, such as therapeutic or diagnostic proteins. The invention further provides methods wherein the environmentally compatible detergent used in the present invention maintains product quality of the therapeutic or diagnostic protein whilst effectively inactivating viruses.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 22, 2022
    Inventors: Wen Luo, Sean Michael O'Donnell
  • Patent number: 10957031
    Abstract: Implementations include receiving image data representative of images of items within a physical environment and depicting defects in at least one item, providing one or more of a set of augmented images using image augmentation based on the image data and a set of synthetic images using ML-based image synthesis based on the image data, processing one of the set of augmented images and the set of synthetic images using an ML model to provide a set of defect characteristics representative of defects in the at least one item, providing one or more root causes of each of the one or more defects by processing the set of defect characteristics and ancillary data, the ancillary data representative of the physical environment, and generating one or more alerts based on the one or more root causes for remediation of at least one root cause of the one or more defects.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: March 23, 2021
    Assignee: Accenture Global Solutions Limited
    Inventors: Tim Wu, Sean Michael O'Connor, Takuya Kudo
  • Publication number: 20210073972
    Abstract: Implementations include receiving image data representative of images of items within a physical environment and depicting defects in at least one item, providing one or more of a set of augmented images using image augmentation based on the image data and a set of synthetic images using ML-based image synthesis based on the image data, processing one of the set of augmented images and the set of synthetic images using an ML model to provide a set of defect characteristics representative of defects in the at least one item, providing one or more root causes of each of the one or more defects by processing the set of defect characteristics and ancillary data, the ancillary data representative of the physical environment, and generating one or more alerts based on the one or more root causes for remediation of at least one root cause of the one or more defects.
    Type: Application
    Filed: September 6, 2019
    Publication date: March 11, 2021
    Inventors: Tim Wu, Sean Michael O`Connor, Takuya Kudo
  • Publication number: 20210056430
    Abstract: Implementations include receiving two or more time-series data sequences representative of a target process executed within a physical environment, executing automated time-series process segmentation to provide a plurality of subsequence segments for each of the two or more time-series data sequences, each subsequence segment corresponding to a phase of the target process, processing the two or more subsequence segments using at least one time-series transformation to provide a feature data set for each subsequence segment, applying each feature data set to provide time-series models for anomaly detection and forecasting, respectively, each time-series model being provided as one of a recurrent neural network (RNN), a convolution neural network (CNN), and a generative adversarial network (GAN), determining anomaly scores based on the time-series models, and selectively providing an alert to one or more users, each alert indicating at least one anomaly and a respective probability.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 25, 2021
    Inventors: Tim Wu, Sean Michael O'Connor, Takuya Kudo
  • Patent number: 10360985
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: July 23, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Patent number: 10235993
    Abstract: An input signal may be classified by computing correlations between feature vectors of the input signal and feature vectors of reference signals, wherein the reference signals correspond to a class. The feature vectors of the input signal and/or the reference signals may be segmented to identify portions of the signals before performing the correlations. Multiple correlations of the segments may be combined to produce a segment score corresponding to a segment. The signal may then be classified using multiple segment scores, for example by comparing a combination of the segment scores to a threshold.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: March 19, 2019
    Assignee: Friday Harbor LLC
    Inventors: David Carlson Bradley, Sean Michael O'Connor, Yao Huang Morin, Ellisha Natalie Marongelli
  • Patent number: 9928919
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: March 27, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Patent number: 9870785
    Abstract: Features that may be computed from a harmonic signal include a fractional chirp rate, a pitch, and amplitudes of the harmonics. A fractional chirp rate may be estimated, for example, by computing scores corresponding to different fractional chirp rates and selecting a highest score. A first pitch may be computed from a frequency representation that is computed using the estimated fractional chirp rate, for example, by using peak-to-peak distances in the frequency distribution. A second pitch may be computed using the first pitch, and a frequency representation of the signal, for example, by using correlations of portions of the frequency representation. Amplitudes of harmonics of the signal may be determined using the estimated fractional chirp rate and second pitch. Any of the estimated fractional chirp rate, second pitch, and harmonic amplitudes may be used for further processing, such as speech recognition, speaker verification, speaker identification, or signal reconstruction.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: January 16, 2018
    Assignee: KnuEdge Incorporated
    Inventors: David Carlson Bradley, Yao Huang Morin, Massimo Mascaro, Janis I. Intoy, Sean Michael O'Connor, Ellisha Natalie Marongelli, Robert Nicholas Hilton
  • Publication number: 20160306582
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-deters fined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Application
    Filed: June 30, 2016
    Publication date: October 20, 2016
    Inventors: Bradley Edman SUNDAHL, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Patent number: 9036423
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: May 19, 2015
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Publication number: 20150006269
    Abstract: A machine based system for facilitating deals is provided that has a memory for storing a list of mavens that assist a vendor in the facilitation of the deal. The list of mavens includes at least one maven that is not an existing customer of the vendor. A voucher for redemption is generated that has information on the deal. A processor is included that determines that the voucher has been redeemed. The processor assigns a commission. The deal may include an incentive for a customer that redeems the voucher.
    Type: Application
    Filed: June 24, 2014
    Publication date: January 1, 2015
    Inventor: Sean Michael O'Day
  • Patent number: 8825920
    Abstract: An electronic device includes an input/output (I/O) interface and a plurality of memory elements comprising a non-volatile memory portion for storing a default firmware and a working memory portion having a firmware area. The device also includes a controller coupled to the I/O interface and the memory elements, where the controller is configured for operating the memory elements, according to the firmware area, and for monitoring the I/O interface. In the device, the controller is also configured for loading the default firmware into the firmware area when the controller is enabled and for granting access to the firmware area for loading an alternate firmware if a bypass code is detected at the I/O interface.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: September 2, 2014
    Assignee: Spansion LLC
    Inventors: Sean Michael O'Mullan, Bradley E. Sundahl, Gregory Charles Yancey, Allan Parker, Arthur Benjamin Oliver, John Anthony Darilek
  • Publication number: 20140092687
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Application
    Filed: December 6, 2013
    Publication date: April 3, 2014
    Applicant: Spansion LLC
    Inventors: Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Patent number: 8625353
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: January 7, 2014
    Assignee: Spansion LLC
    Inventors: Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Patent number: 8375262
    Abstract: An electronic device is provided including an input/output (I/O) interface, a plurality of memory elements, a controller coupled to the I/O interface and the plurality of memory elements. In the device, the controller configured for operating the plurality of memory elements during a normal operating mode of the electronic device, where responsive to receiving a command for replacing a selected memory sector in the electronic device during the normal operating mode, the controller is configured for identifying one or more available spare memory sectors in the electronic device and modifying at least one memory map in the electronic device to replace the selected memory sector with the one of the available spare memory sectors.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: February 12, 2013
    Assignee: Spansion LLC
    Inventors: Allan Parker, Gregory Charles Yancey, Bradley E. Sundahl, Sean Michael O'Mullan, John Anthony Darilek
  • Publication number: 20120320680
    Abstract: A method, apparatus, and manufacture for memory device startup is provided. Flash memory devices are configured such that, upon the power supply voltage reaching a pre-determined level, each flash memory is arranged to load the random access memory with instructions for the flash memory, and then execute a first portion of the instructions for the flash memory. After executing the first portion of the instructions for the flash memory, each separate subset of the flash memories waits for a separate, distinct delay period. For each flash memory, after the delay period expires for that flash memory, the flash memory executes a second portion of the instructions for the flash memory.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Applicant: Spansion LLC
    Inventors: Bradley Edman SUNDAHL, Sean Michael O'Mullan, Gregory Charles Yancey, Kenneth Alan Okin
  • Publication number: 20110179195
    Abstract: An electronic device includes an input/output (I/O) interface and a plurality of memory elements comprising a non-volatile memory portion for storing a default firmware and a working memory portion having a firmware area. The device also includes a controller coupled to the I/O interface and the memory elements, where the controller is configured for operating the memory elements, according to the firmware area, and for monitoring the I/O interface. In the device, the controller is also configured for loading the default firmware into the firmware area when the controller is enabled and for granting access to the firmware area for loading an alternate firmware if a bypass code is detected at the I/O interface.
    Type: Application
    Filed: January 20, 2010
    Publication date: July 21, 2011
    Applicant: Spansion LLC
    Inventors: Sean Michael O'Mullan, Bradley E. Sundahl, Gregory Charles Yancey, Allan Parker, Arthur Benjamin Oliver, John Anthony Darilek
  • Publication number: 20110179319
    Abstract: An electronic device is provided including an input/output (I/O) interface, a plurality of memory elements, a controller coupled to the I/O interface and the plurality of memory elements. In the device, the controller configured for operating the plurality of memory elements during a normal operating mode of the electronic device, where responsive to receiving a command for replacing a selected memory sector in the electronic device during the normal operating mode, the controller is configured for identifying one or more available spare memory sectors in the electronic device and modifying at least one memory map in the electronic device to replace the selected memory sector with the one of the available spare memory sectors.
    Type: Application
    Filed: January 20, 2010
    Publication date: July 21, 2011
    Applicant: Spansion LLC
    Inventors: Allan Parker, Gregory Charles Yancey, Bradley E. Sundahl, Sean Michael O'Mullan, Arthur Benjamin Oliver, John Anthony Darilek
  • Publication number: 20040244628
    Abstract: A projectile (10) for firing from a barrel, said projectile including a multiplicity of barrel assemblies (12, 13, 14) radially disposed from the centre of mass of the projectile, wherein each of said multiplicity of barrel assemblies includes a plurality of sub-projectiles (16) axially disposed within a barrel; each of said sub-projectiles associated with a discrete propellent charge (17) for propelling a respective sub-projectile from the barrel, wherein said projectile is capable of selectively firing sub-projectiles (16), suitably with the aid of primers (18) each coupled to an electronic controller (15). to provide a predetermined pattern of deployed sub-projectiles. A defence system employing projectiles of the type described is also disclosed, together with a method for disguising the launch location of a projectile utilising divert propulsion.
    Type: Application
    Filed: July 23, 2004
    Publication date: December 9, 2004
    Inventors: James Michael O'Dwyer, Sean Michael O'Dwyer