Patents by Inventor Sean P. Mirkes

Sean P. Mirkes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10261795
    Abstract: Method, apparatus, and program means for performing a string comparison operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 16, 2019
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Publication number: 20180321940
    Abstract: A method of one aspect may include receiving a rotate instruction. The rotate instruction may indicate a source operand and a rotate amount. A result may be stored in a destination operand indicated by the rotate instruction. The result may have the source operand rotated by the rotate amount. Execution of the rotate instruction may complete without reading a carry flag.
    Type: Application
    Filed: March 29, 2018
    Publication date: November 8, 2018
    Applicant: lntel Corporation
    Inventors: Vinodh Gopal, James D. Guilford, Gilbert M. Wolrich, Wajdi K. Feghali, Erdinc Ozturk, Martin G. Dixon, Sean P. Mirkes, Bret L. Toll, Maxim Loktyukhin, Mark C. Davis, Alexandre J. Farcy
  • Publication number: 20180203698
    Abstract: Receiving an instruction indicating a source operand and a destination operand. Storing a result in the destination operand in response to the instruction. The result operand may have: (1) first range of bits having a first end explicitly specified by the instruction in which each bit is identical in value to a bit of the source operand in a corresponding position; and (2) second range of bits that all have a same value regardless of values of bits of the source operand in corresponding positions. Execution of instruction may complete without moving the first range of the result relative to the bits of identical value in the corresponding positions of the source operand, regardless of the location of the first range of bits in the result. Execution units to execute such instructions, computer systems having processors to execute such instructions, and machine-readable medium storing such an instruction are also disclosed.
    Type: Application
    Filed: March 14, 2018
    Publication date: July 19, 2018
    Applicant: Intel Corporation
    Inventors: Maxim Loktyukhin, Eric W. Mahurin, Bret L. Toll, Martin G. Dixon, Sean P. Mirkes, David L. Kreitzer, Elmoustapha Ould-Ahmed-Vall, Vinodh Gopal
  • Patent number: 9990201
    Abstract: A method in one aspect may include receiving a multiply instruction. The multiply instruction may indicate a first source operand and a second source operand. A product of the first and second source operands may be stored in one or more destination operands indicated by the multiply instruction. Execution of the multiply instruction may complete without writing a carry flag. Other methods are also disclosed, as are apparatus, systems, and instructions on machine-readable medium.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: June 5, 2018
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, James D. Guilford, Wajdi K. Feghali, Erdine Ozturk, Gilbert M. Wolrich, Martin G. Dixon, Mark C. Davis, Sean P. Mirkes, Alexandre Farcy, Bret L. Toll, Maxim Loktyukhin
  • Publication number: 20180136936
    Abstract: A method in one aspect may include receiving a multiply instruction. The multiply instruction may indicate a first source operand and a second source operand. A product of the first and second source operands may be stored in one or more destination operands indicated by the multiply instruction. Execution of the multiply instruction may complete without writing a carry flag. Other methods are also disclosed, as are apparatus, systems, and instructions on machine-readable medium.
    Type: Application
    Filed: December 27, 2017
    Publication date: May 17, 2018
    Applicant: Intel Corporation
    Inventors: Vinodh Gopal, James D. Guilford, Wajdi K. Feghali, Erdinc Ozturk, Gilbert M. Wolrich, Martin G. Dixon, Mark C. Davis, Sean P. Mirkes, Alexandre J. Farcy, Bret L. Toll, Maxim Loktyukhin
  • Publication number: 20180052689
    Abstract: Method, apparatus, and program means for performing a string comparison operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively.
    Type: Application
    Filed: October 30, 2017
    Publication date: February 22, 2018
    Applicant: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9804848
    Abstract: Method, apparatus, and program for performing a string comparison operation. The apparatus includes execution resources to execute a first instruction. In response to the first instruction, the execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: October 31, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9772846
    Abstract: Processor to perform a packed comparison instruction. The processor includes a decoder to decode the packed comparison instruction. The packed comparison instruction has an immediate to indicate the comparison operation.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: September 26, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9772847
    Abstract: Processor to perform a packed comparison instruction. The processor includes a decoder to decode the packed comparison instruction. The packed comparison instruction has an immediate to indicate the comparison operation.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: September 26, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9740489
    Abstract: Method, apparatus, and program for performing a comparison operation. The apparatus includes execution resources to execute a first instruction. In response to the first instruction, the execution resources store a result of a comparison between valid data element of a first and second operand.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: August 22, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9740490
    Abstract: Method, apparatus, and program for performing a comparison operation. The apparatus includes execution resources to execute a first instruction. In response to the first instruction, the execution resources store a result of a comparison between data element of a first and second operand.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: August 22, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9720692
    Abstract: Method, apparatus, and program for performing a comparison operation. An apparatus includes execution resources to execute a first instruction. In response to the first instruction, the execution resources store a result of a comparison between valid data elements of a first and second operand.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: August 1, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9703564
    Abstract: A processor to perform a string comparison instruction. The processor includes a decoder to decode the string comparison instruction. The packed comparison instruction is to have an immediate that is to be used to control performance of the string comparison instruction. The immediate includes a first set of two bits, a second set of two bits, a third set of two bits, and a fourth bit. The processor also includes an execution unit coupled with the decoder to execute the packed comparison instruction.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: July 11, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9645821
    Abstract: A processor includes a decoder logic to decode a compare instruction, and an execution unit to execute the compare instruction. The compare instruction is to cause the processor to compare integer data elements of a first 64-bit SIMD integer operand with integer data elements of a second 64-bit SIMD integer operand. The integer data elements of the first 64-bit SIMD integer operand to be compared with the integer data elements of the second 64-bit SIMD integer operand are to be in same data element positions. The compare instruction is also to cause the processor to store a plurality of indicators of whether the compared integer data elements of the first and second 64-bit SIMD integer operands are equal. The plurality of indicators are expanded data elements, each of a first multi-bit size.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: May 9, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9632784
    Abstract: A processor includes a decoder logic to decode a compare instruction, and an execution unit to execute the compare instruction. The compare instruction is to cause the processor to determine whether each 32-bit floating point data element of first and second SIMD floating point operands is valid, compare only valid 32-bit floating point data elements of the first 64-bit SIMD floating point operand with only valid 32-bit floating point data elements of the second 64-bit SIMD floating point operand in the same data element position, and store indicators of whether the compared valid 32-bit floating point data elements of the first and second 64-bit SIMD floating point operands are equal.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9495160
    Abstract: Method, apparatus, and program means for performing a string comparison operation. An apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: November 15, 2016
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9448802
    Abstract: Method, apparatus, and machine-readable medium for performing a string comparison operation. An apparatus includes execution resources to execute a first instruction. In response to the first instruction, the execution resources store a result of a comparison between each data element of a first and second operands corresponding to a first and second text strings, respectively.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 20, 2016
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Patent number: 9164762
    Abstract: A method of one aspect may include receiving a rotate instruction. The rotate instruction may indicate a source operand and a rotate amount. A result may be stored in a destination operand indicated by the rotate instruction. The result may have the source operand rotated by the rotate amount. Execution of the rotate instruction may complete without reading a carry flag.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: October 20, 2015
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, James D. Gulilford, Gilbert M. Wolrich, Waidi K. Feghali, Erdinc Ozturk, Martin G. Dixon, Sean P. Mirkes, Bret L. Toll, Maxim Loktyukhin, Mark C. Davis, Alexandre J. Farcy
  • Patent number: 9069547
    Abstract: Method, apparatus, and program means for performing a string comparison operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: June 30, 2015
    Assignee: Intel Corporation
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi
  • Publication number: 20150178079
    Abstract: Method, apparatus, and program means for performing a string comparison operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 25, 2015
    Inventors: Michael A. Julier, Jeffrey D. Gray, Srinivas Chennupaty, Sean P. Mirkes, Mark P. Seconi