Abstract: A method of forming a superconductor interconnect structure is disclosed. The method includes forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposition chamber. The method further includes depositing a superconducting metal in the interconnect opening, by performing a series of superconducting deposition and cooling processes to maintain a chamber temperature at or below a predetermined temperature until the superconducting metal has a desired thickness, to form a superconducting element in the superconductor interconnect structure.

Abstract: A method of forming a superconductor interconnect structure is disclosed. The method includes forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposition chamber. The method further includes depositing a superconducting metal in the interconnect opening, by performing a series of superconducting deposition and cooling processes to maintain a chamber temperature at or below a predetermined temperature until the superconducting metal has a desired thickness, to form a superconducting element in the superconductor interconnect structure.

Abstract: A integrated circuit and methods for fabricating the circuit are provided. The circuit integrates at least one circuit element formed from a material that is superconducting at temperatures less than one hundred milliKelvin and at least one resistor connected to the circuit element. The resistor is formed from an alloy of transition metals that is resistive at temperatures less than one hundred milliKelvin.

Abstract: A integrated circuit and methods for fabricating the circuit are provided. The circuit integrates at least one circuit element formed from a material that is superconducting at temperatures less than one hundred milliKelvin and at least one resistor connected to the circuit element. The resistor is formed from an alloy of transition metals that is resistive at temperatures less than one hundred milliKelvin.

Abstract: The disclosure relates to a high purity 2H-SiC composition and methods for making same. The embodiments represented herein apply to both thin film and bulk growth of 2H-SiC. According to one embodiment, the disclosure relates to doping an underlying substrate or support layer with one or more surfactants to nucleate and grow high purity 2H-SiC. In another embodiment, the disclosure relates to a method for preparing 2H-SiC compositions by nucleating 2H-SiC on another SiC polytype using one or more surfactants. The surfactants can include AlN, Te, Sb and similar compositions. These nucleate SiC into disc form which changes to hexagonal 2H-SiC material.

Abstract: A process is provided for fabricating a semiconductor device having a germanium nanofilm layer that is selectively deposited on a silicon substrate in discrete regions or patterns. A semiconductor device is also provided having a germanium film layer that is disposed in desired regions or having desired patterns that can be prepared in the absence of etching and patterning the germanium film layer. A process is also provided for preparing a semiconductor device having a silicon substrate having one conductivity type and a germanium nanofilm layer of a different conductivity type. Semiconductor devices are provided having selectively grown germanium nanofilm layer, such as diodes including light emitting diodes, photodetectors, and like. The method can also be used to make advanced semiconductor devices such as CMOS devices, MOSFET devices, and the like.

Abstract: A process is provided for fabricating a semiconductor device having a germanium nanofilm layer that is selectively deposited on a silicon substrate in discrete regions or patterns. A semiconductor device is also provided having a germanium film layer that is disposed in desired regions or having desired patterns that can be prepared in the absence of etching and patterning the germanium film layer. A process is also provided for preparing a semiconductor device having a silicon substrate having one conductivity type and a germanium nanofilm layer of a different conductivity type. Semiconductor devices are provided having selectively grown germanium nanofilm layer, such as diodes including light emitting diodes, photodetectors, and like. The method can also be used to make advanced semiconductor devices such as CMOS devices, MOSFET devices, and the like.

Abstract: The disclosure relates to a method and apparatus for growth of high-purity 6H SiC single crystal using a sputtering technique. In one embodiment, the disclosure relates to a method for depositing a high purity 6H-SiC single crystal film on a substrate, the method including: providing a silicon substrate having an etched surface; placing the substrate and an SiC source in a deposition chamber; achieving a first vacuum level in the deposition chamber; pressurizing the chamber with a gas; depositing the SiC film directly on the etched silicon substrate from a sputtering source by: heating the substrate to a temperature below silicon melting point, using a low energy plasma in the deposition chamber; and depositing a layer of hexagonal SiC film on the etched surface of the substrate.