Abstract: A semiconductor package and a method for fabricating a semiconductor package are disclosed. In one embodiment, the semiconductor package includes an exposed portion of a conductive strap at a package horizontal first surface and exposed surfaces of multiple leads at a package horizontal second surface. A power semiconductor die is mounted on a die pad connected to at least one lead having an exposed surface. Heat generated by the die within the package may be dissipated through thermal paths including the exposed surfaces.

Abstract: A two-lead, surface-mounting, high-power micro-leadframe semiconductor package has the same outline, mounting, and electrical functionality as industry standard leadframe packages but provides a lower internal resistance, a higher package power rating, and costs less to produce. The novel package incorporates one of a rectangular array of “micro-leadframes” (“MLFs”), each having parallel and respectively coplanar upper and lower surfaces etched in a plate having a uniform thickness. Each micro-leadframe includes an I-shaped die pad having a head, a foot, and opposite sides. First and second leads are disposed at the foot of the die pad, each having a side aligned with one of the sides of the pad. The second lead has an right-angled wire-bonding pad next to the die pad. A portion of a lower surface of each of the die pad and the leads is exposed through a lower surface of an envelope of plastic molded on the package to define package input/output terminals.

Abstract: A semiconductor device is disclosed that includes a semiconductor die, a metal leadframe, and a metal strap. A bottom surface of the semiconductor device is on and electrically coupled to a first portion of the leadframe. A first end portion of the metal strap is on and electrically coupled to a top surface of the semiconductor die. An opposite, second end portion of the metal strap is on and electrically coupled to a second portion of the leadframe within a recess of the second portion of the leadframe.

Abstract: A semiconductor package and a method for fabricating a semiconductor package are disclosed. In one embodiment, the semiconductor package includes an exposed portion of a conductive strap at a package horizontal first surface and exposed surfaces of multiple leads at a package horizontal second surface. A power semiconductor die is mounted on a die pad connected to at least one lead having an exposed surface. Heat generated by the die within the package may be dissipated through thermal paths including the exposed surfaces.

Abstract: The invention provides a method and apparatus for electrically connecting the die of a high power semiconductor device to a substrate with a conductive strap such that the connection is resistant to the shear stresses resulting with changes in temperature. In one embodiment, the method includes providing a substrate having first and second portions that are electrically isolated from each other. A semiconductor die having top and bottom surfaces and one or more active electronic devices formed therein is also provided. The device has a first terminal connected to a first conductive layer on the bottom surface of the die, and a second terminal connected to a second conductive layer on the top surface of the die. The first conductive layer is electrically coupled to a top surface of the first portion of the substrate. The second conductive layer is electrically coupled to the second portion of the substrate with a metal strap.

Abstract: The invention provides a method and apparatus for electrically connecting the die of a high power semiconductor device to a substrate with a conductive strap such that the connection is resistant to the shear stresses resulting with changes in temperature. In one embodiment, the method includes providing a substrate having first and second portions that are electrically isolated from each other. A semiconductor die having top and bottom surfaces and one or more active electronic devices formed therein is also provided. The device has a first terminal connected to a first conductive layer on the bottom surface of the die, and a second terminal connected to a second conductive layer on the top surface of the die. The first conductive layer is electrically coupled to a top surface of the first portion of the substrate. The second conductive layer is electrically coupled to the second portion of the substrate with a metal strap.

Abstract: This invention provides a method apparatus for electrically connecting a semiconductor die, such as a power MOSFET, to a substrate on which the die is mounted, e.g., a lead frame, with a conductive strap, such that the connection is resistant to the shear stresses incident upon it with changes in temperature of the device. The method includes providing a conductive strap, and in one embodiment thereof, forming a recess in the top surface of the substrate. The bottom surface of a flange portion of the strap is attached to the floor of the recess such that the recess captures the flange and prevents relative horizontal movement of the flange and substrate with variations in the temperature of the device. Other embodiments include attaching the strap to the die and substrate with joints of a resilient conductive elastomer, and forming apertures in the strap and substrate that cooperate with a conductive joint material to reinforce the connection against temperature-induced shear forces.

Abstract: A package for one or more semiconductor die is disclosed, along with a method of making the package. In one embodiment, the package includes a substrate having opposed top and bottom surfaces and an aperture therebetween. The substrate includes an insulative layer and top and bottom metal layers on the insulative layer around the aperture. The metal layers are electrically connected through the insulative layer. At least one die is supported within the aperture by an insulative encapsulant material. The bottom surface of the die is exposed. In alternative embodiments, a stack including a plurality of die (e.g., two die) are supported in the aperture. Rectangular metal are provided in a single row on the bottom surface of the substrate along at least two edges of the package.

Abstract: This invention provides a method apparatus for electrically connecting a semiconductor die, such as a power MOSFET, to a substrate on which the die is mounted, e.g., a lead frame, with a conductive strap, such that the connection is resistant to the shear stresses incident upon it with changes in temperature of the device. The method includes providing a conductive strap, and in one embodiment thereof, forming a recess in the top surface of the substrate. The bottom surface of a flange portion of the strap is attached to the floor of the recess such that the recess captures the flange and prevents relative horizontal movement of the flange and substrate with variations in the temperature of the device.

Abstract: A thin, thermally efficient, lead frame-type of semiconductor package incorporating multiple dies includes a plurality of electrically conductive leads held together in a spaced, planar relationship about a central opening defined by the leads, and a plurality of thick, plate-like heat sinks supported within the opening such they are generally coplanar with each other, parallel to the plane of the leads, and electrically isolated from the leads and each other. Each of the heat sinks has a lower surface that can be exposed through the outer surface of a molded resin envelope encapsulating the package for the efficient dissipation of heat therefrom, and an upper surface having a recess formed into it. A semiconductor die is mounted in each of the recesses with its back surface in electrical connection with the floor of the recess.

Abstract: The present invention includes a package for housing an integrated circuit device. The present invention also includes leadframes and methods for making such packages. In one embodiment, the package includes an integrated circuit device on a metal die pad. A metal ring is between the die pad and leads and surrounds the die pad. The ring is connected to the die pad by a nonconductive adhesive tape. Encapsulant material covers the entire structure, except for portions of the leads. The ring is electrically connected to a lead identified for connection to an external power voltage supply. The ring in turn is electrically connected to a power voltage input pad on the integrated circuit device. The potential of the die pad may float, or the die pad may be electrically connected through a lead to an external ground voltage. The package is made from a leadframe that has a die pad, a metal ring between the die pad and radiating leads, and a nonconductive adhesive tape that connects the ring to the die pad.

Abstract: In the manufacture of semiconductor packages having molded plastic bodies, the plating of all of the surfaces of the molding tool that comes into contact with the molten resin during molding with a nodular thin dense chromium (“NTDC”) coating prevents the surfaces from adhering to the package body and ensures good package release, without formation of cracks or craters in the package body. This, in turn, permits the amount of both release agents and adhesion promoters used in the molding compound to be substantially reduced, or eliminated altogether, thereby resulting in a package body having improved strength and adhesion with the components of the package, and hence, an improved resistance of the package body to the propagation of cracks and its subsequent penetration by moisture.

Abstract: The present invention includes a package for housing an integrated circuit device. The present invention also includes leadframes and methods for making such packages. The package includes an integrated circuit device on a metal die pad. A metal ring is between the die pad and leads and surrounds the die pad. The ring is connected to the die pad by a nonconductive tape. Encapsulant material covers the entire structure. The ring is connected to a lead identified for connection to an external power voltage supply. The ring in turn is connected to a power voltage input pad on the integrated circuit device. The die pad floats, or is connected to a lead that is connected to an external ground voltage. The package is made from a leadframe that has a die pad, a metal ring between the die pad and radiating leads, and a nonconductive tape that connects the ring to the die pad. In one embodiment, the leadframe and package also include a bypass or decoupling capacitor attached between the die pad and the ring.

Abstract: An electronic package with a semiconductor chip, a lead frame, a metal casing, and a redistribution interposer. The chip is mounted on the interposer and wirebonded to first ends of redistribution leads of the interposer. The redistribution leads have second ends orientated in a general flipped orientation relative to their corresponding first ends. The second ends are wirebonded to pads of the lead frame. The interposer allows smaller chips to be used in the package without changing the lead frame. The interposer also allows the chip to be flip-mounted in the package without changing the lead frame or casing, this allows redirection of the chip's thermal path.

Abstract: An integrated circuit extraction tool includes an elongated base having a first end and second end. A first set of teeth are provided on the first end and a second set of teeth are provided on the second end. The first set of teeth are spaced at a first spacing distance and the second set of teeth are spaced at a second spacing distance. In the preferred embodiment, the first set of teeth are spaced to correspond with the spacing between pins of a integrated circuit to be extracted and the second set of teeth are spaced at a distance to correspond to the spacing between base portions of a socket's connectors. One or both of the ends may be angled at ninety degrees to allow integrated circuit removal with minimal clearance.