Patents by Inventor Sean T. Tarlton

Sean T. Tarlton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Synchronous buck converter with dynamically adjustable low side gate driver
    Patent number: 8884597
    Abstract: One embodiment provides A DC-DC converter system that includes a high side switch and a low side switch coupled to a power supply, each switch is configured to transition from an on state to an off state and from an off state to an on state to deliver current to an inductor and a load. This embodiment also includes low side driver circuitry configured to control the conduction state of the low side switch and configured to drive the low side switch with a first gate driving signal during a first mode of operation and with a second gate driving signal during a second mode of operation. The first gate driving voltage is stronger than the second gate driving signal and the second gate driving signal is configured to cause a slower switch transition of the low side switch compared to the first gate drive control signal.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: November 11, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Jon Gladish, Thomas N. Mathes, Sean T. Tarlton
  • SYNCHRONOUS BUCK CONVERTER WITH DYNAMICALLY ADJUSTABLE LOW SIDE GATE DRIVER
    Publication number: 20140021933
    Abstract: One embodiment provides A DC-DC converter system that includes a high side switch and a low side switch coupled to a power supply, each switch is configured to transition from an on state to an off state and from an off state to an on state to deliver current to an inductor and a load. This embodiment also includes low side driver circuitry configured to control the conduction state of the low side switch and configured to drive the low side switch with a first gate driving signal during a first mode of operation and with a second gate driving signal during a second mode of operation. The first gate driving voltage is stronger than the second gate driving signal and the second gate driving signal is configured to cause a slower switch transition of the low side switch compared to the first gate drive control signal.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 23, 2014
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Jon Gladish, Thomas N. Mathes, Sean T. Tarlton